The power manager measures the supply voltage and the amplified voltage dropped across the series resistor. The ADC converts these voltages into digital values and stores the values in a 10-bit ADC register. The ADC register can be accessed via the inbuilt I2C interface and the digital values communicated to an external I2C master on the CPLD. Multiple power managers can be connected via I2C bus, each having a unique slave address. The power controller inside the CPLD implements the multiplier, divider and display driver specific to the user requirements. Any power control scheme can be implemented in the CPLD, which can be optimised for any given application.
The advantages of this approach are:
1. For this application, the power manager device can measure up to twelve rails of voltages. So in a multiple rail design, scaling up the system without board re-spin is possible.
2. The power manager has I2C controlled GPIOs and inbuilt CPLD to implement user-defined logic. Additional discrete components are not desired as all the routine jobs of supply sequencing, reset generation and hot-swap actions can be performed by the power manager.
3. The user can re-program the power manager device, thus providing flexibility for changing the design.
4. The embedded functional block I2C/timer implemented in the CPLD leaves enough LUTs for the designer to have a complex power controller that can have multiple functions of multiplier, divider, PWM control, LCD, RTC, etc. The flexibility associated with CPLDs is useful to design the controller depending upon the end application.
5. There are readily available IP and reference designs for the power manager, multiplier, PWM control and miscellaneous functions which designers can use to quickly create power management solutions for their boards, thus reducing the design time and effort.
To sum up
An integrated programmable power manager device provides the perfect combination to implement power control mechanism for power reduction and optimisation. It has the advantages of scalability, flexibility and ease of development while maintaining the accuracy.
The readily available IPs and reference designs can significantly reduce design time. However, the system designer should use his own discretion for choosing the power measurement and control technique depending upon the application.