Designing with FPGAs: FPGA-Embedded Processors (Part 5 of 5)

Varsha Agrawal

Fig. 5: System configuration

FPGA devices are suitable for implementing parallel algorithms. However, sequential algorithms, especially those that do not demand large processing power, are easier to implement as a program in a microprocessor. Many applications require both microprocessor and an FPGA array. One possible way to implement this is to have separate CPU and FPGA chips. But the better approach is to combine them into a single chip. This reduces the power consumption, leads to simple board layout and fewer problems with signal integration and EMI.

Fig. 1: Embedded-processor design process
Fig. 2: The path for project file

This article gives information on FPGA-embedded processors with particular emphasis on the Embedded Development Kit (EDK) from Xilinx. The article also presents an illustrative example of a hands-on experience with the EDK design.

FPGA-embedded processors
There are two types of CPU cores for FPGAs, namely, hard and soft. Hard CPU core is a dedicated part of the integrated circuit, whereas a soft CPU is implemented utilising general-purpose FPGA logic cells.

Examples of FPGA chips with hard CPU cores include Virtex-4FX and Virtex-5 FXT series with PowerPC cores, and Atmel’s FPSLIC with an AVR core. Some of the soft CPU cores include MicroBlaze and PicoBlaze that are used for the FPGAs manufactured by Xilinx, and Nios II processors that are limited to Altera devices.

MicroBlaze has a proprietary 32-bit RISC architecture and a soft CPU core designed by Xilinx for use in their FPGAs. PicoBlaze has a proprietary 8-bit RISC architecture and a CPU core developed by Xilinx. Nios-II has a proprietary 32-bit RISC architecture and a processor core developed by Altera for use in their FPGAs. It comes in three variants, namely, Nios II/f, Nios II/s and Nios II/e.

Fig. 3: Base System Builder
Fig. 4: Custom board selection
Fig. 5: System configuration
Fig. 6: Processor configuration
Fig. 7: Peripheral configuration
Fig. 8: GPIO data width
Fig. 9: Summary page

The soft processor is typically described in a Hardware Description Language (HDL) or netlist. Unlike the hard processor, a soft processor must be synthesized and fitted into the FPGA fabric. In both hard as well as soft processor systems, the local memory, processor busses, internal peripherals, peripheral controllers and memory controllers must be built from the FPGA’s general-purpose logic.

Fig. 10: Custom board configuration
Fig. 11: System Assembly View
Fig. 12: UCF file

Some of the advantages offered by an FPGA-embedded processor over a typical embedded processor include customisation, obsolescence mitigation, component and cost reduction and hardware acceleration. The embedded-processor-system designer has the complete flexibility to select any combination of peripherals and controllers. In addition, he can design new peripherals to meet any non-standard peripheral set requirement. As an example, if the designer wants six UARTs for his design, off-the shelf processor with six UARTs is not available. However, the same can be implemented in an FPGA easily.

Some of the disadvantages of FPGA-embedded processor include increased tool complexity and design methodology, which require more attention from the embedded designer. Moreover, unlike an off-the-shelf processor, the hardware platform for the FPGA-embedded processor must be designed. If a standard off-the-shelf processor can do the job, that processor will be less expensive in comparison with the FPGA capable of an equivalent processor design. However, if an FPGA is already used in the system, consuming unused gates or a hard processor in the FGPA will make the embedded-processor system’s cost inconsequential.

Fig. 13: Download.cmd file
Fig. 14: Export to SDK/Launch SDK

To facilitate FPGA-embedded processor design, FPGA manufacturers offer extensive libraries of intellectual property (IP) in the form of peripherals and memory controllers. Some of the peripherals and peripheral controllers provided include general-purpose I/O, UART, timer, debug, SPI, DMA controller, Ethernet and so on. Some of the memory controllers include SRAM, Flash, SDRAM and Compact Flash.



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