- SEGGER’s has announced a new version of the RISC-V Floating-Point Library with full support for RV32E – the embedded variant of the RISC-V core
- The new library leads to a massive reduction in code size for RISC-V applications using floating point
With all arithmetic functions hand-coded in assembly language, the memory footprint of RISC-V applications using floating-point code gets minimised. The Floating-Point library complies with the RISC-V ABI standard and can therefore be easily used as a plug-and-play replacement for any other floating-point library.
Replacing the GNU floating-point library used by most toolchains, SEGGER’s assembly optimized equivalent results in an over 72 per cent code size reduction. The library supports RV32I, as well as the newly introduced RV32E embedded variant of the RISC-V core with the assembly-level code.
“This new release is much smaller than anything available to us for comparison and at the same time is incredibly fast,” says Rolf Segger, Founder of SEGGER. “In the world of Embedded Systems, every byte counts. The SEGGER Floating-Point library delivers high performance and uses the architectural advantages of RISC-V to close the code-density gap to comparable Arm Cortex devices.”
Just like the SEGGER Runtime Library, it is integrated into SEGGER Embedded Studio for RISC-V. Using Embedded Studio, benchmarking for both floating-point and runtime libraries can be done quickly and easily. It is readily available at no cost for non-commercial usage under SEGGER’s Friendly License.