Suitable for real-time monitoring of 400GbE/800GbE communications equipment and device bit error rate evaluation
Consequently, evaluation of devices and transceivers supporting PAM4 requires jitter tolerance and sensitivity evaluations based on conventional bit error and error-free measurements along with measurement of error correction capability using FEC.
To meet the above-mentioned needs, the MP1900A series of high-quality bit error rate tester (BERT) for evaluating next-generation 400 and 800GbE high-speed devices and transceivers now comes with a new FEC Analysis function that detects FEC Symbol Errors based on the 400GbE FEC standard. Using this new function, changes in bit errors and FEC Symbol Errors having changes in input amplitude and jitter conditions can be monitored in real-time to quickly and reproducibly evaluate when Symbol Error counts exceed the correction ability of FEC.
Moreover, the new FEC Analysis function is compatible with conventional jitter tolerance automatic measurement software; one-button jitter tolerance measurement is supported based on whether or not error correction using FEC is possible.
Applications include 400GbE/800GbE communications equipment and device bit error rate evaluation.
The new FEC Analysis function of the 116-Gbit/s PAM4 Error Detector (ED) MU196040B option for the Signal Quality Analyser-R MP1900A series is now available from Anritsu Corporation.