A memory-centric SRAM computing chip dramatically reduces onboard AI processing power for future space telescopes, enabling lighter spacecraft, lower launch costs, and real-time optical correction for exoplanet imaging.
A new memory-centric SRAM computing chip by Researchers at the University of Michigan could significantly reduce the power and weight requirements of future space telescopes, addressing one of the biggest challenges in deploying artificial intelligence (AI) for onboard scientific processing. Researchers have demonstrated that the architecture can consume 59 times less power than a GPU-based implementation while supporting the demanding computations needed for next-generation observatories searching for Earth-like exoplanets.
Future space telescopes are expected to rely heavily on AI for adaptive optics, wavefront correction, and real-time image processing. However, conventional computing architectures waste substantial energy transferring data between processors and external memory—a bottleneck commonly known as the memory wall. Instead of accelerating only the processor, the new design shifts computation closer to where data is stored inside static random-access memory (SRAM), minimizing data movement and reducing energy consumption.
The research team evaluated two memory-centric chip architectures and found the SRAM-based implementation to be the most efficient. Simulations indicate that replacing GPU-based onboard processing with the SRAM architecture could reduce power demand from approximately 3,000 W to 51 W. Such a reduction would also lower spacecraft mass from about 1,100 kg to 193 kg, potentially saving an estimated $430 million in launch and mission costs over a 25-year operational lifetime.
The architecture is particularly suited to AI workloads because neural networks repeatedly move large datasets between memory and compute units. By integrating processing directly within or adjacent to SRAM arrays, the chip performs computations where data already resides, improving energy efficiency while reducing latency. This approach is increasingly viewed as a practical solution to overcome memory bandwidth limitations in AI accelerators, especially where power availability is tightly constrained.
Beyond astronomy, the technology could benefit satellites, deep-space probes, autonomous spacecraft, and other edge AI platforms where every watt of power and kilogram of payload matters. As onboard intelligence becomes essential for autonomous scientific observations and faster decision-making, memory-centric SRAM computing offers a promising semiconductor architecture for future aerospace electronics, enabling sophisticated AI capabilities without the high energy overhead of conventional processor-memory systems.
