A supported open-source EDA stack combines simulation, synthesis, verification, physical design, and AI agents in one chip-design workflow.
CaretEDA has launched the 2026.08 release of its Spec-to-Netlist platform, making an end-to-end open-source electronic design automation (EDA) stack commercially available for chip design. The stack brings simulation, logic synthesis, formal verification, and physical synthesis into a single platform and is designed to support agentic chip-design workflows.
The simulation stage uses Verilator for standards-based functional simulation and integrates it directly with agentic verification flows. The logic synthesis stage is based on Yosys and is coupled with agentic optimisation loops focused on quality of results. For formal verification, the platform uses SymbiYosys and provides agentic flows to assist with property generation and proof closure. The physical synthesis stage uses OpenROAD for physically aware implementation, taking designs from register-transfer level (RTL) towards tape-out-ready netlists.
The 2026.08 release brings these four stages together so engineering teams can run end-to-end design flows from a single platform. Teams can use CaretEDA’s own agentic modules or third-party agentic solutions with the EDA stack. The platform removes the need for users to separately download, build, and maintain the individual open-source EDA packages. It also allows open-source and commercial EDA tools to be combined within the same agentic workflow, enabling teams to use different tools across the chip-design flow while working through a common platform.
CaretEDA provides commercial support for the open-source EDA stack, with the 2026.08 release. The company says the commercially supported stack is intended to provide an option for engineering teams that want to use open-source EDA tools without taking on the maintenance and integration work associated with managing the individual packages.
Alongside the EDA stack, CaretEDA has launched its Startup Program for early-stage semiconductor companies. Qualifying startups receive full access to the commercially supported open-source EDA stack and a 90-day evaluation licence for CaretEDA’s agentic modules, including its library of Agentic Building Blocks (ABBs). The ABBs are pre-built, composable agents designed for chip-design workflows, allowing teams to add agentic capabilities to their engineering processes.
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