Thursday, June 13, 2024

Design, Simulate and Automate with Open Source Software

- Advertisement -

Pinguino v1.7.1.4

Arduino is a common hardware used for ATMEL microcontroller based projects. Pinguino is an Arduino-like open hardware but based on Microchip’s PIC microcontroller with built-in USB hardware feature. Pinguino IDE is written in Python, while Arduino is written in Java. So, Pinguino simulation software is compatible with both 8-bit and 32-bit Microchip microcontrollers. One of its biggest advantages is that it is almost fully compatible with Arduino language and libraries. Bootloader is an important feature of Pinguino. Basically, it is a software running inside the Pinguino microcontroller which helps in transferring the user program from the computer to Pinguino’s microcontroller program memory. Pinguino-based projects can be easily accessed on Windows, Linux and MAC OSX.

PCB artist 3.1

PCB artist is an open source PCB design and simulation software that is becoming popular among designers and hobbyists. Compared to other software, it also provides the facility to upload and send files and gerber for direct PCB manufacturing. So, designers need not whack their brain to search for a PCB manufacturer. PCB artist has a comprehensive component library of five million parts.

Rapid SCADA v5.1.1 (For Windows)

Rapid SCADA is a free, open source software to create home automation systems, industrial automation systems, energy accounting systems, security and fire alarming systems or any other system that consists of relays, sensors and controllers. The ease of learning this technically efficient software makes it beneficial for end users and integrators. Using Rapid SCADA, one can deliver cost-effective solutions and enjoy transparency in implementation phase itself. Above all, users get qualified support and consulting services.

- Advertisement -

Winlog Lite

Winlog Lite is another free and open-source SCADA software for web application development and execution. It allows automatic creation of data-acquisition applications, significantly reducing the development time.

PCB 123 v5.5

It is a one-stop solution that lets users design, layout and move ahead with the manufacturing of the board itself. It also helps with real-time design error reporting, so the user gets an error-free PCB in one go. Access to component library, devices and layout is very easy. Above all, there is a 3D display, so users can visualise the boards while designing. Support for accurate design for manufacturing or design rule check is another advantage.


As the name suggests, Clonezilla can clone disk partitioning. This free and open source software also allows system deployment, backup and recovery. It can be used for mass deployment in up to 40 computers in a row. It is available for both 32-bit and 64-bit processors. The EFY DVD includes x64 bit version, which requires 194MB of system memory to run. The software supports file systems such as FAT16, FAT32, FAT64, ext2 and ext3.

BioSig v2.82

BioSig is an open source freeware for biomedical signal processing. It allows analysis of biosignals such as ECG, EEG, ECoG, EOG, EMG and respiration. BioSig finds its major application in neuroinformatics, brain-computer interfaces, neurophysiology, psychology, cardiovascular systems and sleep research. It supports research with tools for data acquisition, artifact processing, quality control, feature extraction, modelling, classification, data visualisation, etc.

Deeds 2017

Digital Electronics Education and Design Suite, or Deeds, is an open source freeware for designing logic networks using simple electronic gates, encoder-decoders, multiplexers and demultiplexer. Besides, it can support sequential logic networks from flip-flops to registers and counters, finite-state machine design and microcomputer programming at Assembly level.

Yosys Open Synthesis Suite

Register transfer level (RTL) and Verilog go together as Verilog is the coding language that describes the data transformation performed between registers through combinational logic. Yosys is a free framework for RTL Verilog synthesis. So, users can design, simulate and synthesise using Yosys.

Looking for other simulation software? Check out other software reviews.


Unique DIY Projects

Electronics News

Truly Innovative Tech

MOst Popular Videos

Electronics Components