Monday, May 27, 2024

JOB: AMS Verification Engineer At Cientra

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APPLY HERE

  • Experience in mixed-signal verification of chip
  • Experience with mixed signal / co-simulation (analog, digital) verification methodologies
  • Experience writing verification plans, creating test benches and automating regression test suites, preparing and presenting detailed verification reviews
  • Experience developing behavioral models for analog IPs in WREAL, Verilog-AMS
  • Understand and debug digital RTL and analog schematics
  • Working knowledge of state-of-the-art EDA tools: Cadence Virtuoso, Cadence Incisiv/Xcelium, Cadence Vmanager
  • Strong background in verification languages and methodologies (e.g. Verilog, SystemVerilog, UVM, SVA).
  • Experience in configuration database management
  • Good communication skills English

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