Friday, June 14, 2024

Analog Design Methodology Engineer At Intel In Bengaluru

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Location: Bengaluru

Company: Intel

  • Work closely with design and CAD team, to develop and deploy circuit simulation, layout validation methodologies to efficiently use tools, to improve design verification time.
  • Using existing tools and scripting skills to effectively automate design, simulation, layout validation flow/tasks
  • Hands on experience in using Industry-standard design layout verification and circuit simulation tools.
  • Knowledge of scripting (Skill/python/tcl etc) desirable. Basic knowledge of circuits and layout debugging skills.
  • Conceptualizes, documents and designs tools flows and methods for use in the analog design, Identifies diagnoses and improves the analog design flow
  • Candidate should be flexible to work on different aspects of process nodes and technology. Good in written and verbal communication skills.


B.E/M.E (ECE/EEE/CSE) with 2+ experience in relevant domain

Skills Required

  • Good Experience with Cadence virtuoso or synopsys custom compiler (Experience with Both is a Plus )
  • Experience on circuit simulation and layout validation.
  • Good Proficiency in scripting in the context of Flow development


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