During an interview with Nitisha from EFY, Travis Lanier, Vice President at Ventana Micro Systems, elaborates on his strategy to drive widespread adoption of RISC-V. He anticipates increased deployment in high-end computing within the next two to three years. Excerpts below.
Q. Please provide more information about RISC-V. What is the process? What advantages does it offer?
A. RISC-V is an open standard. If you’re familiar with Wi-Fi, 4G, or 5G, you know there are standards that allow different manufacturers to create wireless radios that can communicate with each other. RISC-V follows a similar principle; it’s governed by a standards body, RISC-V International, which defines the computer architecture. This open standard is royalty-free, meaning anyone can build CPUs to this specification, and software developed for one CPU will be compatible with others adhering to the standard. Companies like SiFive were early adopters of RISC-V, and this open approach encourages various companies to provide unique solutions. This diversity is where the excitement lies. In contrast to the one-size-fits-all approach of the past, RISC-V fosters innovation, particularly evident in India’s university programs. Historically, CPU research was limited to a few companies due to licensing constraints, but RISC-V has ushered in a renaissance of innovation and research, notably in India. Universities contribute to research, leading to a surge of papers and innovative ideas that were previously inaccessible.
Q. Could you provide information about Ventana Microsystems’ RISC-V processor, and what sets it apart with its distinctive offerings?
A. Ventana is primarily focused on high-performance RISC-V processors. While RISC-V has been prevalent in the low-end market, we’re taking it to new heights. In the past, I was at Arm when our founder, Balaji Baktha, collaborated with Arm to create the first 64-bit Arm CPU, Applied Micro X-Gene. Fast forward a decade, and we’re doing the same thing with RISC-V, but with a focus on high performance. We’re also delving into chiplet technologies, allowing us to create scalable solutions with late binding, where you can attach different technologies to your system-on-chip (SoC) at a later stage, reducing costs. This flexibility extends to memory choices, like DDR 4 or DDR 5, HBM. Our late binding capability lets you decide on memory type and quantity. Furthermore, we offer a traditional IP model for creating custom SoCs using our RTL.
Q. How does Ventana Micro Systems plan to capitalise on the RISC-V adoption within India’s tech industry?
A. Our strategy involves partnering with startups and universities to create differentiated platforms using RISC-V chiplets and IP. This approach facilitates the development of unique solutions tailored to India’s needs.
Q. How will your company navigate the evolving landscape and position itself as a leader in RISC-V innovation and market adoption?
A. We are the people that made this first happen for Arm in the 64-bit data centre space. So, a big part of it is that we have done this before – we are not flying blind. We have maintained our focus on high-performance RISC-V and chiplet enablement since day one, without getting sidetracked by microcontrollers or AI processors. We aim to collaborate with others to seamlessly integrate their AI and data centre innovations with our CPUs. Our open approach allows customisation to cater to India’s specific needs, particularly regarding security and sovereign compute.
Q. Are you witnessing any developments in RISC-V adoption and growth at present?
A. Yeah, I mean, you can look worldwide. Almost all countries, if they don’t already have a RISC-V plan, are rapidly adopting it. Many countries are adopting RISC-V, especially in microcontrollers for small devices. There are also significant plans for data centres and high-performance computing globally. We anticipate more high-end deployments within the next two to three years as various initiatives gain momentum. RISC-V’s open source and open standard nature has spurred a surge in software development, making it more advanced than Arm’s early days. So you have all these people and individual contributors, large companies already pushing up the software stacks for RISC-V. We expect tremendous progress in the coming years.
Q. What educational and skill development initiatives are crucial for RISC-V’s success?
A. RISC-V is already integrated into university curricula, and we foresee increased collaboration between universities and companies. Engineers familiar with RISC-V, graduating from these programs, will accelerate the industry’s adoption of RISC-V. Unlike in the past, where theoretical processor architecture was the norm, today’s engineers get hands-on experience with smaller open-source designs, streamlining their transition to working on commercial implementations. RISC-V’s open standard nature allows for open and commercial cores, and companies are providing resources, like boards, that they can go and work with, or in what we are looking to do, is a partner with various universities or accelerator programs from universities where, where they could do a low-cost chiplet and attach their own cost accelerator. You pair that up with our chipset IO hub, and then create a platform. So that’s one of the things. We aim to partner with various universities and startups in India to foster this ecosystem.
Q. How does Ventana plan to accelerate India’s evolving semiconductor industry amid global competition?
A. We gave a presentation at Semicon India. Our founder is an Indian, and we have multiple offices in India. Ventana employs a chiplet model that empowers smaller companies to create high-performance solutions cost-effectively and quickly. Traditional SoC development demands significant resources, both in terms of engineering talent and budget. If you look at the traditional SoC, it could easily be $300-$400 million before you can see your first silicon. In contrast, our chiplet model allows for the integration of existing off-the-shelf components which can significantly reduce development costs. For instance, you can take our compute chiplet, you can take an IO hub, stitch these together. After that, you can focus on your differentiation, whether it’s some domain-specific acceleration or your AI accelerator, and this piece can be taped out as a much smaller chiplet. It can be even in an older process technology, in 12nm, or 14nm. These complex pieces can be put together in just over a year, and the cost can be an order of magnitude lower.
Our goal is to partner with various entities in India to provide our chiplets as a foundation for their more intricate designs
Q. What strategies will Ventana employ to leverage India’s initiative for the semiconductor manufacturing group?
A. We plan to partner with Indian organisations to provide our chiplets as the basis for creating complex solutions. With our design centres in India, we can collaborate closely with local teams to accelerate these developments.
Q. What is your perspective on chip making and design in India?
A. India plays a significant role in chip design, and many major semiconductor companies are already doing substantial design work in the country. So, India is already deeply involved in most of the chip production today. This involvement is expected to grow as time progresses.
Q. Do you have customers in India or globally?
A. We have a global customer base, and we are actively engaged in several projects in India. When we recently spoke at Semicon India, our chiplet model garnered substantial interest, particularly for high-performance computing applications, including HPC, data centres, and ADAS in India.
Q. What are your plans for launching new products?
A. We introduced our first-generation processor in December, and we have exciting plans on the horizon. Stay tuned for our next-generation product announcement.