APPLY HERE
Location: Bengaluru
Company: Siemens
This is Your Role
- Integrate and utilise Verification IPs (VIPs) for PCIe/CXL (Gen3/Gen4/Gen5/Gen6).
- You will specify, implement, test and enhance these verification components for a wide range of end-user applications.
- You will work on technologies involving SV, UVM, Assertions, Coverage, Test plan, BFM design, debug, and logger.
Requirements
- You’re a Graduate / Post Graduate (Bachelors/Masters) in EEE) / ECE/VLSI from top reputed Engineering colleges with 1-2 Years of significant experience in software development. Experience in EDA will be a phenomenal plus.
- Practical experience with any of the following protocols: AMBA, PCI/PCIe, SAS, Ethernet, MIPI.
- Experience in IP and SOC level verification.
- Knowledge of verification methodologies such as Specman, SV, UVM, OVM, TLM, Assertion, Coverage, co-simulation, and co-verification.
- Good interpersonal skills for working with external interfaces.
- FPGA/Emulation experience is helpful.
- Strong scripting and automation knowledge is a significant plus.
