What if the future of chips no longer depends on manufacturing machines? A new design strategy is betting exactly on that.
Huawei says it aims to achieve transistor density comparable to 1.4-nanometer chips within the next five years by pursuing a semiconductor design strategy that reduces reliance on manufacturing tools restricted by the US.
The Chinese technology company outlined what it calls the “Tau Scaling Law” — an approach that prioritizes data movement, latency, and interconnect distances inside chips instead of focusing only on shrinking transistor sizes.
The strategy is part of China’s push to build domestic alternatives to foreign semiconductor technologies after US export controls cut Chinese firms off from chipmaking equipment, particularly extreme ultraviolet (EUV) lithography systems used to manufacture chips.
Huawei said the new approach could allow its chips to reach transistor densities equivalent to 1.4 nm processes by 2031, though the company did not release performance data or technical benchmarks supporting the claim.
The company plans to introduce the architecture, called “LogicFolding,” in future Kirin smartphone processors later this year before expanding it to Ascend AI chips and AI computing systems by 2030.
The announcement reflects a shift underway in the semiconductor industry as transistor scaling becomes more difficult and expensive. For decades, chipmakers relied on Moore’s Law — the idea that transistor count on chips doubles roughly every two years — to improve computing performance. But with components approaching atomic-scale limits, manufacturers are increasingly looking for gains through packaging, architecture, and system-level efficiency.
Huawei’s proposal fits within that trend. Rather than depending entirely on smaller transistors, the company is trying to improve how information moves within chips and across computing systems.
Huawei said it has designed and mass-produced 381 chips over the past six years using concepts related to Tau Scaling across smartphones, AI systems, and industrial applications.
Analysts, however, say obstacles remain despite the company’s ambitions. Challenges around power consumption, heat dissipation, chip design software, and integration are likely to become more difficult as AI workloads grow.
