Features improved thermal resistance and can withstand high continuous currents with efficient utilisation of the PCB for design flexibility
Contemporary power system designs demand high power density levels and small form factors for maximum system-level performance.
Tackling this challenge is the OptiMOS 40 V low-voltage power MOSFET, which primarily addresses SMPS for server, telecom, and OR-ing, as well as battery protection, power tool and charger applications.
It features source potential that is connected to the PCB over the thermal pad instead of the drain potential. This variant can lead to a major reduction of RDS(on) by up to 25 per cent and improved thermal resistance between junction to case (RthJC) (compared to the current technology).
The OptiMOS can withstand high continuous currents of up to 194 A. Additionally, the optimised layout possibilities and the more efficient utilisation of the PCB allows for greater design flexibility together with the highest performance.
In addition to the 25 V device introduced in February, the OptiMOS 40 V low-voltage power MOSFET is available in two versions, standard and Center-Gate. The Center-Gate variant is optimised for parallel operation of multiple devices. Both variants in the Source-Down (SD) PQFN 3.3 x 3.3 mm2 package can be ordered now.
