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The Standard Cell Design Team is a part of Physical Design Group and enables Arm eco-system with tuned digital libraries leading to best in class implementation Arm cores. We work on the latest technology nodes and our libraries go into hardening of the latest Arm cores pushing the limits of performance.
The Standard Cell Design group works on logic IP development for leading process technology nodes optimized to get the best out of our cores. We characterize, generate the views essential for the optimal use of the libraries. We also run QA on our libraries to ensure the quality. We also interact and collaborate with our customers to ensure that the libraries are used successfully. As a part of this team, you will participate in different aspects of digital design, running library characterization and library QA.
Required Skills and Experience :
- Bachelors or Masters with 1+ years of experiences in developing standard cells.
- A detailed understanding of CMOS and FinFet device characteristics
- Prior experience and understanding of digital circuit design (combinational and sequential logic)
- Ability to setup and run spice simulations
- Exposure to standard cell characterization tools such as Cadence Liberate or Synopsis PrimeLib
- Experience in Library characterization, view generation and Library QA
- Good knowledge of timing, noise, power and variation modeling for standard cells
- Strong in scripting languages such as Perl and Python
- Good interpersonal and networking skills
- Self-motivated, hardworking and exhibits attention to detail
“Nice To Have” Skills and Experience:
An understanding of standard cell layout and imp