Sunday, February 9, 2025

JOB: Lead Physical Design Engineer At Qualcomm In Noida

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APPLY HERE

Location: Noida

Company: Qualcomm

General Summary

As a leading technology innovator, Qualcomm pushes the boundaries of what’s possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

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Minimum Qualifications

Bachelor’s degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.

OR

Master’s degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

OR

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

General Summary

  • PNR implementation for Qualcomm SoC’s
  • Good hands-on  experience on Floorplanning, PNR and STA flows
  • Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc
  • Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc
  • Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting

Principal Duties and responsibilities

  • Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route, etc.) on latest nodes.
  • Signoff knowledge is mandatory (STA, Power analysis, FV, low power verification, PV, etc.)
  • Quick learner with good analytical and problem-solving skills

Qualifications:

  • 5+ years Hardware Engineering experience or related work experience.
  • 5+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm

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