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Processors undergoing changes to save power

Processors undergoing changes to save power

Power versus performance is an ongoing battle, with the best involving a compromise between the two. High-performance system(s)-on-chip (SoC) designers often struggle to achieve the best possible power-performance balance. Customers’ user experience is an important aspect to consider as it determines performance improvements. However, this calls for increasing the battery size as most devices are battery-powered. Memory tracker technology from Performance-IP, for example, enables low power processors to operate at higher efficiency.

Power reduction techniques for processors

A typical SoC design consists of processors, memory clients, interconnects and memory systems. Processors are one of the major power consumers in a device, so switching off the CPU when idle helps. This includes turning off the processor when all processes are blocked, when processes appear to be busy waiting and extending real-time process sleep periods. Studies have shown these to increase battery lifetime by approximately 20 per cent in Apple systems.

Zen Core block diagram
Fig. 1: Zen Core block diagram

These tricks are often used by processor designers as well. Dynamic power consumption in a processor arises from circuit activity. As performance, that is, speed and frequency, of the IC increases, the amount of dynamic power also increases. Dynamic power is data-dependent and closely tied to the number of transistors that change states. A hidden component of dynamic power is loss due to dynamic hazards. This must be taken care of while designing power-conscious processors.

Architectural changes to reduce power

Crusoe from Transmeta is a very long instruction word (VLIW) processor designed for low-power applications including mobile PCs and Internet devices. It allows microprocessors to emulate Intel X86 instruction set. Instead of the instruction set being implemented on the hardware, Crusoe runs a software abstraction layer known as code morphing software.

This has brought about a reduction in required power. Intel processors at 400MHz used to consume about 7.4 watts, or AMD clocked at 700MHz at the time consumed 34 watts. The 700MHz Crusoe uses one watt, which was a revelation when introduced.

LongRun in Crusoe, monitors the precise performance level needed by an application and dynamically adjusts the processor’s operating speed and voltage to match it. This increases the battery life by a significant amount.

Following this, there is SpeedStep from Intel that allows clock speed of the processor to be dynamically changed by the software. It allows the processor to meet the instantaneous performance needs of the operation being performed, thus minimising power consumption and loss through heat.

LongHaul is a speed-throttling technology developed by VIA Technologies that helps reduce power consumption. It uses specialised instructions utilised by the software to exercise control on bus-to-core frequency ratio and CPU core voltage. When the system boots up, ratio and voltage are set to hardware defaults. Depending on the load on the CPU, a CPU driver controls the throttling during operation.

Following a similar course, AMD’s dynamic frequency scaling and power saving known as PowerNow (mobile chips) and Cool‘n’Quiet (desktop and server chips) allowed adjusting clock speed under varying loads and idle conditions to save battery power. These power-saving techniques allowed power saving but, caused problems with the operating systems. Microsoft also reported problems previewing video files with SpeedStep enabled under Windows 2000 or XP. This called for making further changes, resulting in newer protocols that are being implemented today.

Power saving for the present

Building up on PowerNow, AMD launched Turbo Core beginning with Bulldozer architecture. The architecture focused on reducing power consumption over the earlier K10 architecture for higher performance per watt.

Bulldozer processors are based on GlobalFoundries’ 32nm silicon on insulator, which reuses DEC approach for multitasking computer performance. By eliminating redundant elements that creep into multi-core designs, it aims to take advantage of its hardware capabilities while using less power.

This is followed by Zen architecture that looks to define balance between power and performance. As per multi-threaded Cinebench R15, performance per watt is more than double than it was for Piledriver architecture.

Zen architecture includes a complex stack engine that can eliminate certain stack manipulation instructions. This coupled with the core design, which is optimised to use less power, is something to look out for. It has an integrated power management controller that monitors and adjusts the voltage used by each core according to the temperature and loading.

 Cortex M4 has been very popular with low-power processors for the IoT
Fig. 2: Cortex M4 has been very popular with low-power processors for the IoT

Unlike previous versions, power management roles are baked directly into silicon and are out of the control of the software and operating system. The hardware on the chip can respond in a matter of milliseconds, allowing much tighter control over voltages and clock speeds.

Balancing power and performance.

Intel Turbo Boost draws a parallel with Turbo Core from AMD. However, Enhanced Intel SpeedStep Technology is more power conscious and allows the system to dynamically adjust processor voltage and core frequency, decreasing average power consumption and heat production.