HomeElectronics NewsDigital Test System Validates High-Speed Interconnects

Digital Test System Validates High-Speed Interconnects

A test system checks optical and copper connections, measures errors, adjusts signals, and generates reports for data centre networks.

Keysight Expands Active and Passive 1.6T Copper Interconnect Validation for Scale-Out Data Centres
Keysight Expands Active and Passive 1.6T Copper Interconnect Validation for Scale-Out Data Centres

Keysight Technologies has introduced the Functional Interconnect Test Solutions (FITS)-16CH digital-layer error performance validation system for testing optical, active copper, and passive copper interconnects. The system has 16 transmit and 16 receive channels, twice the channel density of the FITS-8CH. It is designed to validate complete interconnect assemblies during research and development, product design, manufacturing, and pre- and post-production deployment of artificial intelligence (AI) and network infrastructure.

As interconnect speeds increase, physical-layer testing alone may not provide a complete picture of system-level error performance. FITS-16CH combines bit error ratio (BER) and forward error correction (FEC) measurements at the digital layer to evaluate the performance of complete interconnect assemblies under real-world conditions. It supports validation at 106G and 212G lane rates for 800G interconnects and emerging 1.6T technologies.

The system supports a range of optical and electrical interconnects, including full-retimed optics (FRO), active optical cables (AOCs), linear-retimed optics (LRO), linear pluggable optics (LPO), active copper cables (ACCs), active electrical cables (AECs), passive direct attach cables (DACs), and high-speed copper flyover cables. These interconnects are used in networking and high-performance computing equipment. The platform also supports development and manufacturing workflows for silicon chips, networking equipment, and interconnect products, along with performance benchmarking for data centre operators.

FITS-16CH uses two Module Compliance Boards (MCBs), with independent channel groups and MCB controls, to test fully assembled interconnects across multiple lanes simultaneously. This allows engineering teams to evaluate system-level performance across more channels in a single setup. Its large insertion-loss budget supports testing through lossy channels and customer fixtures, including active copper and high-speed copper flyover cables.

The system includes a Windows 11 graphical user interface that integrates with Keysight’s DCA-X data communications analyser to automate lane tuning. The software calculates optimal transmit finite impulse response (FIR) filter tap settings to open the electrical eye. This process can reduce tuning time to a few minutes, compared with manual tuning that may take hours, days, or weeks.

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Nidhi Agarwal
Nidhi Agarwal
Nidhi Agarwal is a Senior Technology Journalist at Electronics For You, specialising in embedded systems, development boards, and IoT cloud solutions. With a Master’s degree in Signal Processing, she combines strong technical knowledge with hands-on industry experience to deliver clear, insightful, and application-focused content. Nidhi began her career in engineering roles, working as a Product Engineer at Makerdemy, where she gained practical exposure to IoT systems, development platforms, and real-world implementation challenges. She has also worked as an IoT intern and robotics developer, building a solid foundation in hardware-software integration and emerging technologies. Before transitioning fully into technology journalism, she spent several years in academia as an Assistant Professor and Lecturer, teaching electronics and related subjects. This background reflects in her writing, which is structured, easy to understand, and highly educational for both students and professionals. At Electronics For You, Nidhi covers a wide range of topics including embedded development, cloud-connected devices, and next-generation electronics platforms. Her work focuses on simplifying complex technologies while maintaining technical accuracy, helping engineers, developers, and learners stay updated in a rapidly evolving ecosystem.

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