Wednesday, November 29, 2023

Microcontroller With Advanced I3C Features And Versatile Design

By Nidhi Agarwal

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Capable of reaching speeds up to 12.5 MBit/s in target device mode, the device features dynamic address assignment and maintains backward compatibility with I2C.


Microchip has launched a PIC18-Q20 line of microcontrollers. These advanced chips are available in 14- and 20-pin configurations and are notable for their multi-voltage I/O capabilities. The company claims they’re the inaugural low-pin count microcontrollers with an I3C target mode.

In this field, Microchip’s PIC18-Q20 claims to be the market’s premier general-purpose microcontroller with this novel interface. I3C uses a two-wire multi-drop bus system consisting of a clock and data wire. While it remains backwards compatible with I2C buses, it brings a significantly higher data transfer rate to the table. 

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The microcontroller functions exclusively in the I3C target mode. It aligns with a version of the I3C v1.0 specification called the MIPI I3C Basic Specification 1.0. This subset doesn’t require royalty payments and is licensed under the RAND-Z agreement. Furthermore, it is equipped with the I3C’s innovative features, such as in-band interrupts, dynamic address allocation, and the ability to join while active.

A standout feature of the microcontroller is its ability to run its core logic at a voltage distinct from the I3C interface. To illustrate, its multi-voltage I/O capability allows for I3C operations at voltage levels ranging from 0.95 to 3.63.

Apart from the aforementioned unique attributes, this line of microcontrollers is furnished with standard features such as a program flash memory of up to 64 kilobytes, 4 kilobytes of SRAM, 256 bytes of data EEPROM, multi-channel 10-bit ADCs, capacitive touch sensing, and various timers.

Some of the key features of the microcontroller product line are:

  • C Compiler Optimized RISC Architecture
  • Operating Speed: DC – 64 MHz clock input
  • Four Direct Memory Access (DMA) Controllers:
  • Vectored Interrupt Capability
  • 128-Level Deep Hardware Stack
  • Low-Current Power-on Reset (POR)
  • Configurable Power-up Timer (PWRT)
  • Brown-out Reset (BOR)
  • Low-Power BOR (LPBOR) Option
  • Windowed Watchdog Timer (WWDT)

Currently, these chips are available in a variety of surface mount packaging as well as the classic through-hole PDIP design. For more information, click here.


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