Intel Agilex D-Series FPGA Designed For Variety Of Applications

By Jay Soni

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Intel has introduced Agilex D-Series FPGAs and SoCs with a wide range of application sets including communications, medical, industrial and even aerospace applications.

The original Intel Agilex FPGA and SoC families have performed as a performance booster for several applications. Its wide range of characteristics has made it a versatile solution for several workloads. The emerging trends for most midrange applications demand lower power consumption and higher performance .

Credit : Intel

Intel has introduced Agilex D-Series FPGAs and SoCs for midrange FPGA applications which require highest performance, low power and smaller form factors such as, studio camera and 8K video transport, and wireless infrastructure (macrocells, front and back haul, and radio units).

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This new FPGA and SoC family incorporates many new features such as an upgraded hard processor system (HPS), Enhanced DSP with AI Tensor Block, MIPI I/O support, and hardened time-sensitive network controller (TSN). also share significant features with other Intel Agilex FPGA and SoC families including the 2nd-generation Intel Hyperflex FPGA Architecture and high-speed SerDes transceivers.

These new devices incorporate several hard IP blocks that are new to the Intel Agilex FPGA family including the Enhanced DSP with AI Tensor Block, a time-sensitive networking (TSN) block, a MIPI interface, and an upgraded hard processor system (HPS) that includes a dual-core Arm Cortex-A76 processor and a dual-core Arm Cortex-A55 processor.

The Enhanced DSP with AI Tensor Block introduces two new important operations: the tensor processing capability for AI and complex number support for signal processing applications such as FFTs and complex FIR filters. The devices are manufactured using Intel 7 technology, which is now a mature process used to manufacture high-volume CPUs. The Intel 7 technology permits creation of programmable-logic devices that integrate fast I/O circuits including high-speed, 28 Gbps SerDes transceivers and flexible general-purpose I/O banks along with programmable logic and hardened IP blocks, all on one monolithic silicon die.

Arm DynamIQ technology allows software developers to harness the Arm Cortex-A76 and Arm Cortex-A55 CPUs into a single integrated cluster that delivers improved power and performance for a wide variety of applications.


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