HomeJobs & CareersJOB: Design Verification Engineer (SoC / IP Power Management) At Ampere In Bengaluru

JOB: Design Verification Engineer (SoC / IP Power Management) At Ampere In Bengaluru

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Location: Bengaluru

Company: Ampere

In this role, you will focus on the verification of CPU and chip-die (Cdie) level Power Management features for our server-class microprocessors. Your work will ensure that our processors achieve optimal power efficiency without compromising performance. You will collaborate closely with architecture, design, and post-silicon teams to validate and debug power management features, contributing to our cutting-edge AI compute solutions.

As part of our team, you will be at the forefront of innovation, helping us deliver high-performance, energy-efficient products. 

The Design Verification team at Ampere is dedicated to ensuring that every product meets the highest standards of quality and efficiency. We are a collaborative, fast-paced group, committed to leaving no stone unturned in our verification processes.

What you’ll Achieve

  • Define requirements for power management verification at both sub-system and full-chip levels.
  • Develop detailed test plans focused on power management features for both pre-silicon and post-silicon environments.
  • Architect, design, and implement test benches and verification environments specifically for power management.
  • Create targeted and random test generators to identify power-related bugs.
  • Analyze and debug power management failures, driving rapid resolution.
  • Develop coverage monitors and achieve targeted coverage metrics for power management features.
  • Define and execute post-silicon validation plans for power management, supporting accelerated product launches.

About You

  • B.Tech in Electronics Engineering or Computer Engineering with 2+ years of semiconductor experience, or M.Tech with 1+ years of experience.
  • Strong experience in hardware verification, particularly in power management for IPs or SoCs.
  • Proficient in industry-standard HDL languages (Verilog, System Verilog, VHDL) and simulation tools.
  • Experience in developing verification environments using languages such as SVTB UVM/OVM.
  • Proficiency in programming languages like C, C++, Perl, and Python for automation tasks.
  • Experience in automating design, verification, and validation tasks related to power management.
  • Familiarity with ARM, RISCV, or x86 assembly language programming is beneficial.
  • Understanding of CPU architecture, power management techniques, coherent fabrics, and interconnects is a plus.
  • Excellent written and verbal communication skills, with a strong attention to detail and analytical/problem-solving abilities.
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