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Location: Bengaluru
Company: NVIDIA
What you’ll be Doing
- As a member of the DFT team, you will be working on verification of state of art Memory BIST logic along with other DFT circuits like JTAG, IO BIST and ATPG.
- You will be Validating test features with a robust & scalable testplan development at unit-level and SOC/Full Chip level using verification methodologies like UVM and NVIDIA Internal tools.
- Simulating Pre-Silicon Simulation and Debug of Test functionality using standard Industry tools and sign- off on Test coverage for various products using standard coverage metrics.
- Would work on automation, flow development & improvement, coverage metrics, test execution, bug identification/fix , and Memory-test productisation.
- Rich exposure and work on powerful Industry-standard tools for Design and verification methodologies. This includes SV, UVM, Perl, Python, and NVIDIA custom tools/flows.
- Partner closely with our design team to understand our architecture, then collaborating with QA engineers to deliver good test coverage and improve software quality.
Requirements
- Btech/BE/BS or Mtech/ME/MS in EE/ECE or equivalent experience
- Solid Analytical and Problem-Solving skills.
- Good understanding and Exposure to Logic design, Architecture & Verification
- Strong Coding skills in industry- standard scripting languages.
- Exposure to DFT circuits and methodology.
- 1+ yrs of experience in Industry-standard verification flows like constrained random testing, UVM, coverage metrics, profiling tools, X prop, etc. will be plus.
- Outstanding written and oral communication skills with the curiosity to learn.
