A new vertically stacked MOSFET packaging approach increases power density, reduces parasitic inductance, improves switching efficiency, and saves PCB space for AI servers, telecom, industrial power, and e-mobility designs.
Alpha and Omega Semiconductor has introduced the AOPL66801, an 80V MOSFET featuring the company’s new AmpStack packaging technology, designed to significantly increase power density while reducing PCB footprint in high-current power conversion applications. The device integrates two vertically stacked MOSFET dies in a half-bridge configuration within a compact DFN6×5 package, enabling designers to replace conventional discrete MOSFET implementations with a more space-efficient solution.
Unlike traditional layouts that use two separate MOSFET packages, the AmpStack architecture stacks the high-side and low-side MOSFETs vertically. This approach increases usable board area while shortening electrical paths between switching devices. The result is lower parasitic inductance, reduced switching losses, and improved overall power conversion efficiency, particularly in high-frequency DC-DC converters and power stages.
The key features are:
- Vertically stacked dual-die half-bridge MOSFET architecture
- Compact DFN6×5 AmpStack package
- Kelvin source pin for improved gate-drive stability
- Maximum junction temperature of 175°C
- Optimized switch-node clip reduces voltage ringing and parasitic inductance
The AOPL66801 also incorporates an optimized internal clip structure that minimizes inductance at the switch node connecting the two MOSFETs. Lower inductance helps suppress phase-node voltage ringing during fast switching events, reducing electrical stress on the transistors while improving system reliability. These characteristics are increasingly important in modern power electronics operating at high switching frequencies, where parasitic effects can degrade efficiency and electromagnetic compatibility.
To further enhance switching performance, the device includes a dedicated Kelvin source sensing pin. By providing a cleaner gate-drive reference, the Kelvin connection minimizes gate voltage fluctuations caused by high di/dt switching currents, resulting in more stable operation and lower conduction and switching losses. The MOSFET also supports a maximum junction temperature of 175°C, allowing operation in thermally demanding environments while maintaining reliable performance.
The compact half-bridge MOSFET is intended for applications requiring high power density and efficient thermal management. Target markets include AI server power supplies, telecom infrastructure, industrial power systems, synchronous buck converters, intermediate bus converters, battery-powered equipment, and e-mobility platforms where board space, efficiency, and thermal performance are critical design considerations. By combining advanced packaging with integrated half-bridge functionality, the AOPL66801 enables designers to build smaller, higher-performance power stages without compromising electrical or thermal performance.
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