JOB: Associate Engineer- DI At Qualcomm

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APPLY HERE

Location: Chennai

Company: Qualcomm

General Summary

Primary responsibilities will include,

  • Interface with design team to ensure DFT design rules and coverages are met.
  • Generating high quality manufacturing ATPG test patterns for stuck-at (SAF), transition fault (TDF) models through the use of on-chip test compression techniques.
  • MBIST verification (including repair), test pattern generation through Mentor tool.
  • ATPG (SAF, TDF) and MBIST verification using unit delay and min/max timing corner simulations.
  • Work with the Product/Test engineering teams on the delivery of manufacturing test patterns for ATE.

Minimum Qualifications

  • Be a member of the team that plays a significant role in ensuring the quality of Connectivity SoCs through structured DFT, Automatic Test Pattern Generation (ATPG) and Memory Built-In Self-Test (MBIST) techniques.
  • BE with minimum of 1 years exp
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