Company: Hermes Semiconductors
Domain: Design Verification
Designation: Sr Engineer / Lead / Sr Lead
Experience Range: 5 to 9 years
What You’ll Do
Your responsibilities will include, but are not limited to:
- Develop UVM testbenches from scratch.
- Develop Pre-Silicon functional validation tests to verify if the system will meet design requirements.
- Create test plans for RTL validation.
- Define and run system simulation models.
- Find and implement corrective measures for failing RTL tests and analyze and use results to modify testing.
- Coverage analysis and closure.
- Working on next generation high speed protocols and SoCs.
What You’ll Need
- Minimum Bachelor’s degree in Electronics, Electrical or Computer Engineering, Math, Physics, or related fields
- 6 plus years of experience (4+ for Masters, 2+ for PhDs) in relevant Pre-Silicon validation positions having gone through multiple project cycles to gather in-depth experience.
- Expertise in logic design verification with various tools and methodologies including System Verilog, Perl, OVM/UVM, logic simulators, and coverage tools.
- Must be a team player, with a demonstrated experience technically influencing others.
- Strong problem-solving skills.
- Excellent verbal and written communication skills.Ability to work effectively in a team as well as individually with excellent communication and interpersonal skills
- Brownie points if you have experience in
- PCIE, CXL, Ethernet, Wireless and Memory controllers.
- Remote Direct Memory Access protocols like iWARP or RoCE.