Capacitor Evaluator Circuit
As shown in Fig. 1, the capacitor evaluator comprises a linear ramp generator built around timer IC 555 (IC1). A linear ramp is generated when the resistor between the power supply and shorted pins 6 and 7 of the monostable circuit is replaced with a constant-current source formed by the circuit built around pnp transistor CK100 (T1). Push-to-on switch S1 is used to trigger ramp generator IC1.
The time period of linear ramp is given by:
The output pulse duration at pin 3 of IC1 is counted by the circuit comprising the astable multivibrator built around timer 555 (IC2) followed by decade counter ICs 74LS90 (IC3 and IC4), which are 4-bit ripple decade counters. The outputs of IC3 and IC4 are connected to decoder/driver ICs 74LS47 (IC5 and IC6), respectively, which are further connected to 7-segment common-anode displays LTS542 (DIS1 and DIS2) for displaying the frequency of astable (IC2) used to evaluate the value of unknown capacitors.
If the counter counts up to ‘N1’ for known-value capacitor C1 and up to ‘N2’ for unknown capacitor C2, you can calculate the value of the unknown capacitor from the following relationship:
Insert known-value capacitor C1 (say, 47µF) into the ‘CUT’ socket shown in Fig. 1 and press S1 momentarily. The counter counts up to, say, ‘32’ (N1). Now remove the 47µF capacitor from the socket and insert the unknown-value capacitor (C2). The counter now counts up to, say, ‘16’ (N2).
Substituting the values of C1, N2 and N1 in Eq. (2) gives 23.5 µF as the value of the unknown capacitor.
The article was first published in February 2006 and has recently been updated.