HomeElectronics NewsEfficient Clock Chip for AI and Data Centers

Efficient Clock Chip for AI and Data Centers

AI servers and data centers may soon run faster and more efficiently with a new timing technology designed for high-speed computing and networking systems.

 PCIe 7.0 Clock Generator from Diodes Incorporated Delivers Sub-30fs Jitter for Next-Gen AI Infrastructure
 PCIe 7.0 Clock Generator from Diodes Incorporated Delivers Sub-30fs Jitter for Next-Gen AI Infrastructure

Diodes Incorporated has introduced the PI6CG33A06, a six-output ultra-low jitter clock generator engineered to support the demanding requirements of the PCI Express 7.0 specification while remaining fully compatible with earlier PCIe generations. Unveiled at the PCI-SIG Developers Conference, the device is aimed at high-performance applications including servers, networking infrastructure, HPC platforms, and AI-focused data center systems.

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The PI6CG33A06 delivers highly accurate 25MHz and 100MHz reference clocks with RMS jitter performance below 30 femtoseconds (fs). This significantly surpasses the PCIe 7.0 jitter limit of 67fs and improves on the 80fs benchmark defined by Intel’s CK440Q specification. By minimizing jitter to these levels, the device gives system designers additional timing margin to address signal integrity challenges in complex high-speed PCB and connector environments.

Built to support 128.0 GT/s PCIe links, the clock generator enables the performance requirements of emerging 800G and 1.6T networking systems as well as advanced AI accelerators. Precise clock timing at these data rates is essential for maintaining throughput, stability, and reliability across modern data center architectures.

The device incorporates Diodes’ proprietary low-power, high-speed current-steering logic (LP-HCSL) technology with integrated termination. Compared to conventional HCSL implementations, this approach cuts clock-related power consumption by at least 50% while also reducing thermal output in dense AI server deployments. Its high level of integration removes the need for up to 24 external resistors, helping lower BOM costs, simplify PCB design, and free valuable board space for cooling, memory, or additional processing resources.

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Each of the six outputs features an independent output enable (OE) pin, giving engineers more granular power management and operational control. The PI6CG33A06 also supports Intel CK440Q-Lite specifications and integrates easily into existing server clock architectures, allowing developers to leverage established system designs while enhancing timing accuracy and overall system performance margins.

“PCIe 7.0 specification is pushing system performance to new heights, particularly for AI and high-bandwidth data center applications,” said Al Yanes, PCI-SIG President and Chairperson. “PCIe clock generators, including Diodes’ PCIe 7.0 clock generator, help streamline system integration to support these advances.”

Click here for the original announcement.

Nidhi Agarwal
Nidhi Agarwal
Nidhi Agarwal is a Senior Technology Journalist at Electronics For You, specialising in embedded systems, development boards, and IoT cloud solutions. With a Master’s degree in Signal Processing, she combines strong technical knowledge with hands-on industry experience to deliver clear, insightful, and application-focused content. Nidhi began her career in engineering roles, working as a Product Engineer at Makerdemy, where she gained practical exposure to IoT systems, development platforms, and real-world implementation challenges. She has also worked as an IoT intern and robotics developer, building a solid foundation in hardware-software integration and emerging technologies. Before transitioning fully into technology journalism, she spent several years in academia as an Assistant Professor and Lecturer, teaching electronics and related subjects. This background reflects in her writing, which is structured, easy to understand, and highly educational for both students and professionals. At Electronics For You, Nidhi covers a wide range of topics including embedded development, cloud-connected devices, and next-generation electronics platforms. Her work focuses on simplifying complex technologies while maintaining technical accuracy, helping engineers, developers, and learners stay updated in a rapidly evolving ecosystem.

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