Monday, July 15, 2024

Single-Chip Network Synchronisation Solution For Precise 5G Radio

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Offers integrated high performance in a single compact, low-power device supported by synchronisation algorithm software modules

Achieving 5G technology performance that is 10x more accurate than 4G requirements through packet-switched networks is the new ZL3073x/63x/64x network synchronisation platform by Microchip Technology. The highly integrated, low-power, multi-channel integrated circuit (IC) is coupled with the company’s widely adopted and reliable IEEE 1588 Precision Time Protocol (PTP) and clock recovery algorithm software modules.

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The architecture provides flexibility with up to five independent Digital Phase Locked Loop (DPLL) channels that consume only 0.9W of power in a compact 9 mm x 9 mm package that simultaneously reduces board space, power and system complexity.

With five ultra-low-jitter synthesisers, the latest platform offers 100 femtoseconds (fs) root mean square (rms) jitter performance required by high-speed interfaces in the latest 5G RU, DU and CU systems.

Microchip’s network synchronisation platform software includes its ZLS30730 high-performance algorithm coupled with its ZLS30390 IEEE 1588-2008 protocol engine. Both are widely deployed in 3G, 4G and 5G networks with precise timing capabilities. The ZL3073x/63x/64x network synchronisation platform seamlessly combines with the company’s precision 5G oscillators such as the OX-601 Oven Controlled Crystal Oscillator (OCXO) for offering 5G network operators a total system solution.

Microchip’s measure, calibrate and tune capabilities ensure 5G systems achieve International Telecommunication Union – Telecommunication (ITU-T) Standard G.8273.2 Class C (30ns max|TE|) and the emerging Class D (5ns max|TEL|) time error requirements.

“Our newest ZL3073x/63x/64x network synchronisation platform implements sophisticated measure, calibrate and tune capabilities, thereby significantly reducing network equipment time error to meet the most stringent 5G requirements,” said Rami Kanama, vice president of Microchip’s timing and communications business unit. “A uniquely flexible architecture for implementing the necessary channel density as well as high-performance, low-jitter synthesisers help simplify the design of timing cards, line cards, Radio Units (RU), Centralised Units (CUs) and Distributed Units (DUs) for 5G Radio Access Networks (RAN).”

Microchip’s ZL3073x/63x/64x network synchronisation platform is available in production quantities and offered with IEEE 1588 PTP and algorithm software modules for download. Also offered are graphical user interface (GUI) and evaluation board along with application notes and other design-in support tools.


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