Friday, February 23, 2024

Data Interface: HSIC versus USB

Andrew Rogers is applications engineer at Microchip Technology

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Making the connection

HSIC interface is structured such that a host or peripheral can be powered on in any order. To ensure a false connection is not detected, the host, hub and peripherals must ensure that the strobe or data lines do not float to an undetermined value, commonly referred to as tri-stated.

Fig. 4 shows an oscilloscope capture of a connect sequence. This connect sequence is much simpler than the USB connect sequence because there are no speeds to negotiate. This sequence can be handled by a very simple state machine, reducing die size requirements.

Connect sequence from idle and suspend to connecting and resuming signalling
Fig. 4: Connect sequence from idle and suspend to connecting and resuming signalling

With standard USB, the host can determine if a downstream port has been disconnected by monitoring the magnitudes of DP/DM signal voltages. If the voltage exceeds the disconnect voltage threshold, the host can conclude that the device has been disconnected.

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HSIC does not support a disconnect protocol because it is intended to be a hard-wired, always-on connection. However, it is still possible to have a situation where a downstream device may appear to have disconnected, and care must be taken to ensure the host does not permanently lose its connection with the device.

This apparent disconnection or standoff can occur because the host always maintains an idle state while the bus is unused, and the idle state is identical to the suspend state from a signal perspective. The host has no way of knowing if or when a downstream device has been powered down or disconnected. Since the suspend signalling is identical to the idle signalling, it is possible to reach a state where a downstream device believes it has been suspended while the upstream host thinks there is no device downstream and waits indefinitely for a connect signal to arrive. A similar standoff condition could occur if the upstream host disables the port while the device believes it has been suspended.

This condition is not likely to occur between hosts and devices that never cycle power or soft reset. If this issue is encountered, it must be dealt with in an application-specific manner at either the link or software-stack level. This can be done by programming the software stack or designing the link in a way that prevents the condition from occurring in the first place.

Alternatively, the system(s)-on-chip (SoC) can attempt to deal with a downstream device after it disconnects by resetting HSIC hub. The device discovery sequence will occur, and the connection will be re-established.

On Microchip’s USB254x, USB3613, USB3813, USB4604 and USB4624 devices, the SoC can use VBUS_- DET pin to re-establish the connection. Pulling the pin low suspends the hub, while pulling the pin high wakes it up.


HSIC standard has advantages over USB in hard-wired applications as long as the correct connection and disconnection procedures are observed. These procedures are particularly important when troubleshooting some issues involving HSIC connectivity.



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