A new magnesium-based contact process cuts resistance in thin p-GaN, potentially improving efficiency and fabrication flexibility for LEDs, transistors, EVs, and data-centre electronics.
Researchers at Nagoya University have developed a low-resistance ohmic contact technology for thin p-type gallium nitride (p-GaN), addressing a longstanding limitation in GaN-based electronic devices. The approach uses an ultrathin magnesium layer followed by a brief thermal treatment to reduce contact resistivity without significantly roughening or damaging the GaN surface.
Ohmic contacts are critical because they provide the electrical connection between a semiconductor and external circuitry. In p-GaN, however, achieving low-resistance contacts is difficult. Magnesium doping creates holes, but magnesium behaves as a relatively deep acceptor at room temperature. This leaves the metal-semiconductor interface with a shortage of mobile holes and produces a depletion region that obstructs charge transport, increasing power loss.
The team, led by Haitao Wang and Jia Wang, tackled this problem by depositing an ultrathin magnesium film directly on the p-GaN surface. Instead of using the thicker magnesium layers explored in earlier work, the researchers reduced the film thickness to no more than about 10 nanometers. This helped address surface roughness that had previously limited the practical use of the technique.
The researchers then applied a process called soft annealing, heating the structure to 600°C for five minutes. During this treatment, magnesium rapidly diffuses into the surface region of the p-GaN and is incorporated at very high concentration. The resulting surface remained considerably smoother than that produced using thicker magnesium films.
The modified interface achieved a contact resistivity of approximately (1–3) × 10⁻⁴ Ω·cm², placing it among the lowest reported values for thin p-GaN contacts. The highly concentrated magnesium-doped surface reduces the width of the depletion region, allowing holes to tunnel more readily across the semiconductor-contact interface.
An important advantage is that the process follows a simpler top-down approach rather than requiring additional bottom-up crystal growth. It can also be introduced after other device-processing steps, potentially improving compatibility with existing semiconductor manufacturing flows. The researchers are now evaluating the technique in GaN devices, including LEDs and transistors intended for applications such as electric vehicles and data centres, where lower electrical losses can contribute to improved system efficiency.
