Can one cryptographic design serve a tiny IoT device and a defence system expected to operate for decades? Four versions of each security IP are being developed to meet these different demands.
Logic Fruit Technologies is developing four implementation variants for each of its four post-quantum cryptography (PQC) intellectual property (IP) cores, including a defence-grade version designed to resist side-channel attacks.
In an exclusive interaction with EFY, Mohammad Rafi, associate director, technical marketing, explained that the variants will address different application requirements. The development is part of the L-QNTX security platform, announced in September 2026.
The standard version balances performance and hardware resource use. The compact variant is intended for resource-constrained Internet of Things (IoT) and edge devices, while the high-performance version targets AI data centres and enterprise appliances. The defence-grade variant addresses a different concern: information that can leak from a device even when its encryption remains mathematically secure.
“There is a chance that these secrets may get leaked through power fluctuations or electromagnetic radiation,” Rafi said. By analysing such signals, an attacker could infer sensitive information, including cryptographic keys. This is the side-channel risk the defence-grade implementation is intended to address.
The hardware is also being designed to accommodate changes in cryptographic standards. Defence and aerospace systems can remain in service for 10–25 years, during which algorithms may become obsolete. Field-programmable gate arrays (FPGAs) allow the cryptographic engines to be replaced without redesigning the entire hardware platform. “Hence, if you have an FPGA, you can replace all those obsolete engines with the latest ones,” Rafi said.
While the four cores, ML-KEM, ML-DSA, SLH-DSA and QS-Hash are in progress, the roadmap also includes application-specific integrated circuit (ASIC) development in the latter part of 2028, following field testing of the FPGA implementations. Early access to the Soft IP suite is targeted for Q2 2027, with hardware security module (HSM) evaluation hardware expected in Q3 2027.
In our upcoming conversation, Rafi discusses the development of these IPs, security challenges in defence electronics, and India’s prospects for building its own post-quantum security capabilities.
