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Location: Bengaluru
Company: Broadcom
Job Description
As part of the TLR team (top-level-route), R&D Engineer is primarily responsible for:
- Place and Route, CTS, Routability analysis with respect to congestion.
- Well-versed in physical verification aspects, DRC, LVS, Antenna, LUP ( chip finishing and Tapeout)
- Integration of analogue blocks, Meeting RC requirements for manual/special signals
- Good understanding of Calibre rule deck of DRC/LVS/DFM, DFY, ERC and ESD latchup.
- Responsible for all the integrity checks and post-tapeout eJob view release,
- Good scripting knowledge perl and TCL, familiar with Calibre, Innovus,
- Understanding of VLSI fabrication process,
- Implementing timing ECOs. Implementing IR drop fixes, SPEF/GPD extraction, signal EM fixes, Noise analysis.
- Responsible for all the integrity checks and post-tapeout eJob view.
- Open to new responsibilities in the context of rapid technological change.
- Good communication skills; work closely with the team members to accomplish PD milestones.
- Secondary competencies: Good understanding of CTS, STA, PTSI and timing.
Relevant experience with CAD tools Cadence Innovus, Calibre is preferred.
Experience: 4 to 8 years
