HomeElectronics NewsWafer Platform Adds Hidden Defect Detection

Wafer Platform Adds Hidden Defect Detection

A new wafer inspection platform combines AI analytics, sub-micron imaging, SWIR sensing, and precision metrology to help semiconductor fabs improve yields and the quality of advanced packaging.

 Wafer Inspection and Metrology Platform

A newly launched wafer inspection and metrology platform by Test Research, Inc. (TRI)  is targeting semiconductor fabs that need tighter defect control, faster process feedback, and higher yields in advanced packaging and wafer-level manufacturing. Built for 6-inch to 12-inch wafers, the system combines automated visual inspection, precision measurement, and optional hidden-defect sensing in a modular architecture aimed at both mature and next-generation chip production. 

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The key features are:

  • Supports 6-inch, 8-inch and 12-inch wafers
  • AI-powered automated visual inspection
  • Optional SWIR hidden crack detection
  • 0.5 µm / 1 µm high-resolution 3D imaging
  • Measures TSV depth, warpage and thin films

The platform arrives as chipmakers face rising complexity from chiplets, wafer-level packaging, TSV structures, and ultra-thin wafers. Traditional inspection tools often struggle to combine throughput, resolution, and measurement accuracy in one system. This release addresses that gap by integrating defect detection with micro-measurement metrology, helping fabs shorten learning cycles and reduce scrap. 

One of the standout capabilities is an optional Short-Wave Infrared (SWIR) module that can penetrate silicon to detect hidden inner cracks and subsurface defects invisible to conventional visible-light systems. Such defects are increasingly critical in thin wafers and advanced packages where microfractures can trigger downstream failures. 

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For detailed surface analysis, the system also offers optional 0.5 µm or 1 µm resolution imaging using a 3D Depth From Focus module. This supports inspection of wafer surfaces, bumps, trenches, patterned wafers, and dimensional variations that directly affect packaging reliability and electrical performance. 

Metrology functions extend beyond defect review. The tool can measure wafer thickness, top-side warpage, surface topology, TSV depth, trench dimensions, and thin-film layers, including oxide, nitride, photoresist, and polyimide coatings. That makes it useful for fabs needing both process monitoring and inline yield management. 

As semiconductor manufacturing shifts toward heterogeneous integration and higher-value wafers, inspection platforms are evolving into data-rich process control engines. By combining AI-driven analytics, precision optics, and modular sensing, the new platform reflects the industry’s move toward smarter, more adaptive fabs. 

Click here for the original announcement.

Akanksha Gaur
Akanksha Gaur
Akanksha Sondhi Gaur is a journalist at EFY. She has a German patent and brings a robust blend of 7 years of industrial & academic prowess to the table. Passionate about electronics, she has penned numerous research papers showcasing her expertise and keen insight.

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