There is a problem though. In case of cell overlaps, this situation becomes complicated. As each cell uses a separate plane, so information must be combined from these separate planes in case of any overlap. Therefore circuits cannot be extracted hierarchically as it can cause transistors to split between cells or form (appear?) broken in cell-overlap situations.
Magic, however, allows the cells to overlap as long as the transistor structure is not changed. This means, you can have extracted circuit to be represented hierarchically. The extracted circuit will contain the circuit of the cell, circuits of its sub cells and connections between them.
Though Magic can deal with cell overlapping, extensive use of cell overlaps is not recommended. Extended overlapping will cause the tool to run very slowly and hard to make any modifications.
Stretch and compact cells
Plowing is a special feature that allows you to rearrange the layout without changing the electrical circuit which it represents. The plow operation preserves the design rules and connectivity to maintain the electrical structure of the circuit.
As the plow moves, every edge in its path is pushed ahead of it (not the layers), preserving design rules, connectivity, transistors and contact sizes. This makes everything ahead of the plow to get compacted down to a minimum spacing as per the design rules, and the material which crosses its original position gets stretched behind the plow.
You can stretch or compact most of the materials including polysilicon, diffusion and metal. However, components like transistors and contacts can only be moved, their shapes cannot be changed.
Magic is a technology-independent layout editor where all the technology-specific information is contained in a technology file. This file includes information about layer types used, electrical connectivity between types, design rules, rules for mask generation and rules for extracting netlists for circuit simulation.
Since there is different technology file for every fabrication process, you can either build your own or re-write the existing one for a new fabrication process. You can download the standard technology file using FTP server at MOSIS foundation. You can select the symbolic link ‘Current’ for the latest version at the following URL: ftp://ftp.mosis.edu/pub/sondeen/magic/new/beta/current.tar.gz
Magic is different from the other layout editors available. It is not just a colour-painting tool, it understands geometrical design rules, transistors, connectivity and routing. It is a very handy tool for easy bug fixing and experimentation with alternative designs to enhance the performance of a circuit.
One of its major features, which the other similar tools lack, is routing. Routing is the most tedious and error-prone task, but Magic has made it easy with its interactive routing tools. Another problem with the other tools is their inflexibility and difficulty to experiment with them.
But Magic’s built-in knowledge of design rules and interactive feature of continuous design-rule check with an in-built hierarchical circuit extractor makes this tool highly flexible and easy to use. Also, its plowing feature enables students to experiment and have better intuition on designing chips and fix bugs easily.
You can download the latest version of the tool and find the related tutorials on their website. If you are trying to learn about the system, you can start with the various tutorials available on the website. Also, there is a set of manuals for the system maintainers that can help in creating new technologies.
While running Magic, you can get help from the tool itself. Its help command will provide you the command’s syntax with a brief description of the command. For other queries and support, you can write to Magic authors at [email protected]
Download latest version of the software: click here
The author is a technical journalist at EFY