Thursday, May 30, 2024

System Validation Engineer At Intel In Bengaluru

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Location: Bengaluru

Company: Genpact

Job Description

  • As a Validation Engineer/Lead, you will be part of the Silicon Engineering Team, developing high performance Packet Processing Silicon.
  • You would be working on system and platform level validation on Foundational Ethernet Solutions (FNIC SoC’s), Smart NIC’s that intelligently manage system-level resources by securely accelerating networking and storage infrastructure functions in a data center.
  • You will be a key member of the silicon validation team responsible for ensuring that we deliver high-quality silicon to customers.
  • Be responsible for developing the integration, validation plan and developing and implementing necessary tests for validation.
  • Develop detailed test plans, based on design specifications and coordination with a cross-functional team (e.g., architecture, design, software, firmware).
  • You will own the laboratory debug of failures with cross-functional teams (Silicon, Boards, Software, Manufacturing, PPV) and contribute into the deep dive debug of the issues.
  • As part of this role, you will plan, write and execute tests to establish functional health of our ASICs, both under nominal and PVT conditions.
  • You will develop test cases that executes concurrent scenarios and induces stress on different domain and parts of the silicon to ensure the Si performance and validate different features.
  • Tasks will include understanding the Product System Requirements, defining test specifications, creating System Level Test Plan, design, develop, operate, and maintain software based validation tests and perform pre/post validation with laser sharp focus on Silicon quality assurance through validation coverage.
  • Participate in validation plan staging to emulation model, silicon availability schedule, prioritizing the test cases for the respective milestone , validation driver and firmware coordination, cross and virtual platforms usage, emulation prototyping , silicon bring-up activities.
  • Integrate and validate complex hardware and software designs in pre-silicon through functional bring-up.
  • Perform long-term system characterization and debug and root-cause failures.
  • Provide feedback to improve features like power management quality, performance, and reliability through generations of designs including pre-silicon prototyping platforms as well as post-silicon bring-up and production.


  • Have demonstrated strong packet processing experience, silicon, system and functional testing, as well as good understanding of emulation, firmware and software stack know how experience.
  • Possess an in-depth understanding of hardware architectures, system level IC design implementation, and knowledge of how to create end use scenarios
  • Strong technical background in FPGA prototype emulation, and debug
  • Strong technical background in silicon validation, failure analysis and debug
  • Understanding Design with RTL coded in Verilog/System Verilog is a must
  • Good knowledge of validating system level designs based on embedded processors and peripherals such as SPI, I2C, UART, JTAG
  • Prior hands-on automation script development and optimization (using C/C++, Python).
  • Well versed in the usage of advanced lab equipment (scopes, BERTs, programmable power supplies, PCIe Analyzers etc).
  • Proven analytical and problem-solving abilities
  • Knowledge and experience in embedded firmware debug and development is big plus
  • Good understanding of embedded firmware/software development process is a plus
  • Good knowledge and experience in JTAG, Debug Access and Tools.
  • Good experience in architectural and design aspects of the validation tests suite development
  • Great team player, highly motivated to support the team with technical expertise and hands on experience in validation test cases development and debug
  • Excellent communication and leader ship skill
  • Knowledge of High Speed Oscilloscopes, Logic Analyzers, Data Acquisition Tools/Hardware
  • 3+ years of experience with SOC Functional Power Measurements (Leakage, Standby, Dynamic)
  • 3+ years of experience with Linux Shell Scripting, Linux Kernel Programming
  • 3+ years of the Hardware design and Hardware Validation Capabilities
  • Bachelor’s or Master’s degree in EC/EE/CS with 10+ years of experience

System validation engineer: Responsibilities

  • Ownership of pre/post-silicon validation of system as well as specific domain including both HW and SW
  • Develop and execute post-silicon test plans by running test contests on silicon
  • Develop software to test, evaluate and stress the silicon and system
  • Develop automation software and scripts for measurement data collection and analysis.
  • Contribute for device boot/silicon bring-up, debug, and feature development
  • Escalate technical issues and risks, with appropriate data, to management to take immediate actions
  • Understand intended features and stress scenarios from a customer perspective and develop test scenarios accordingly
  • Demonstrate results with technical solutions

System validation Engineer: Qualifications

  • A minimum of 4+ years of experience developing validation test case suite for full feature scope coverage
  • Excellent C/C++ programmer. Assembly language experience is a plus.
  • Experience with scripting languages like python, perl or expect is a plus
  • Lab skills, debug silicon issue on system level using the debug tools
  • Knowledge of High Speed Oscilloscopes, Logic/protocol Analyzers, Data Acquisition Tools/Hardware
  • Work in the pre-silicon emulation environments to ensure successful silicon bring-up as Silicon becomes available
  • Experience in pre silicon FPGA model usage is a plus
  • Bachelor’s or Master’s degree in EC/EE/CS with 4+ years of experience


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