A breakthrough computing approach solves complex optimization problems faster while using far less energy, offering a practical alternative to today’s emerging quantum technologies.
Researchers at the National University of Singapore (NUS) have developed a new class of spintronic computing hardware that promises to accelerate complex optimisation tasks while significantly reducing energy consumption. The work introduces probabilistic computing systems built around magnetic tunnel junctions (MTJs), nanoscale devices that naturally generate controllable randomness for computation.
Optimisation problems underpin a wide range of applications, including logistics, chip design, communications, financial modelling and artificial intelligence (AI). As these challenges become increasingly complex, conventional processors often require considerable computational time and power. While quantum computing has long been viewed as a potential solution, practical large-scale deployment remains some way off. The NUS team instead demonstrates that scalable spintronic hardware could provide an effective near-term alternative.
In the first study, researchers developed a parallel probabilistic Ising processor integrating 144 spintronic random number generators. The architecture achieved a 3.2-fold improvement in processing speed while reducing energy consumption by 58.3% compared with a conventional CPU-based implementation. When benchmarked against tested D-Wave quantum annealers on quadratic assignment problems, the spintronic processor consistently produced feasible, high-quality solutions across the full dataset, whereas the quantum systems struggled as problem complexity increased.
A second study expanded the concept using 250 spin-transfer torque magnetic tunnel junctions, demonstrating a larger probabilistic Ising machine. By employing a cluster parallel update method, the researchers achieved a tenfold acceleration for sparsely connected graph problems without modifying the underlying hardware. The approach also improved solution quality by up to 20 times compared with conventional simulated annealing while increasing tolerance to device variability.
Rather than treating device randomness as a limitation, the researchers harnessed it as a computational resource, combining stochastic magnetic devices with parallel architectures and advanced annealing algorithms to improve performance and efficiency.
The team plans to scale the technology further using chiplet-based architectures, targeting future energy-efficient computing platforms for AI, logistics, scheduling, financial modelling, communications and electronic design automation, where rapid optimisation is increasingly essential.
