The IEEE Solid-State Circuits Society is pleased to announce its first open-source integrated circuit design contest under the umbrella of its PICO Program (Platform for IC Design Outreach). While this contest is open to any individual or team in its first year (IEEE SSCS membership is not required), we especially encourage the participation of pre-college students, undergraduates, underrepresented minorities, and geographical regions that are underrepresented in the IC design community. The final designs resulting from this contest will be submitted for 130 nm CMOS chip fabrication via Efabless’ chipIgnite program.
Interested designers should submit a short proposal containing: A block diagram, schematics of the critical circuit core, target performance summary table, a short description of the circuit and your specific design goals, applicable references (e.g., a paper that inspired your design, any open-source blocks that you will reuse, etc.) and a list of the involved team members (if any, in addition to the lead designer submitting the proposal).
- July 6, 20021: Announcement date.
- July 30, 2021: Deadline to submit proposals through the contest’s Efabless Portal.
- August 5, 2021: Announcement of ~15-20 selected round 1 design teams.
- August 5 – October 15: Weekly online meet-ups with all design teams and volunteers/mentors. Q&A, networking, and discussion of potential design mergers.
- September 24: Selection of round 2 participants for tapeout. The goal is to fill 6 shuttle run seats with the most compelling individual and merged designs. Round 1 participants who are not selected for tape-out are free to participate in a later Open-MPW run.
- October 15: Final project submission deadline for tapeout.
- January 31, 2022: Delivery of packaged silicon and evaluation boards (see the chipIgnite website for details).
- February 7 – March 7, 2022: Online meet-ups for test debug discussions and result sharing.