Program Status Word comprising the accumulator and status registers is modified as per given instructions. An accumulator stores the result of an arithmetic and logical operation, and the result affects the content of various status registers.

What the simulator consists of
The simulator is designed to be very user-friendly and simulations are to be at par with actual hardware simulations. Let us have a quick look at the interesting features offered by the tool.

Assembler editor. This allows the user to input numerical data in binary, decimal and hexadecimal formats. The programmer can insert comments, label instructions and check errors using the editor. There are provisions for auto-correct, auto-intend and syntax highlighting. Moreover, users are allowed to run programs written in other simulators in this editor.

Disassembler editor. In most cases, the user is allowed to reverse-trace the original program successfully from the original code using this editor. The editor supports loading of hexadecimal file format that is specific to Intel.

Assembler workspace. The workspace contains Address field, Label, Mnemonics, Hex-code, Mnemonic size, M-cycles and T-states. While it supports the static-timing diagram for all instructions, dynamic-timing diagram for step-by-step simulations are also supported. It also provides error checking facility.

Memory and I/O editors. The memory editor allows users to choose memory range and to modify data in a particular memory location. Users can either view the entire memory content or the one in the loaded memory location. They can store data directly into a specified memory location.

The I/O editor required for peripheral interfacing enables users to edit the content directly.

Interrupt editor. An interrupt is a mechanism by which an instruction suspends normal execution of the program and gets itself serviced. A non-maskable interrupt cannot be ignored by standard interrupt-masking techniques in the system, while a maskable interrupt can be disabled by writing some instruction. The simulator supports a non-maskable interrupt in 8085 (TRAP), maskable vectored interrupts (RST 7.5, RST 6.5 and RST 5.5) and an externally-serviced interrupt (INTR).

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The interrupt editor allows triggering of these interrupts by pressing appropriate columns in the interrupt table.

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