A compact laser-powered accelerator could push beyond current EUV limits, enabling smaller chip features, higher throughput, and more efficient semiconductor manufacturing. In a conversation with Nidhi Agarwal from EFY, Jerome Paye of TAU Systems also discussed the technology’s potential in space radiation testing. Read the full interview for deeper insights.

Q. What are the main problems with current semiconductor manufacturing using extreme ultraviolet (EUV) lithography?
A. Current semiconductor manufacturing relies on EUV scanners, mainly developed by ASML, which are reaching their physical and economic limits. These systems use a fixed 13.5 nm wavelength, generated by striking tin droplets with a laser to create plasma. This wavelength cannot be changed, so printing smaller features requires increasing the system’s numerical aperture, which means making ever-larger, extremely precise mirrors, a process that is very difficult and expensive. Additionally, these mirrors have only about 70% reflectivity, and the light must pass through 11 mirrors before reaching the wafer. This means only a small fraction of the generated light actually reaches the wafer, limiting printing speed. Together, these limitations in resolution, efficiency, and cost point to the need for a new approach to lithography light generation.
Q. Can you explain the technology TAU Systems is developing and why it matters for semiconductor manufacturing?
A. We are developing a system that generates light using a completely new method called a laser-powered accelerator. Unlike standard particle accelerators, which are hundreds of metres long and use radio-frequency systems, our system uses extremely short and intense laser pulses. These pulses turn gas into plasma, creating 3D waves of electrical charge. Some electrons get ‘trapped’ on these waves and are accelerated to high energies over just a few millimetres, achieving what conventional accelerators need hundreds of metres to accomplish.
Once accelerated, the electrons pass through an undulator, a series of alternating magnets that make them oscillate and emit coherent extreme ultraviolet (EUV) or X-ray light. This light is tunable, allowing us to select the wavelength that best matches the mirrors and photoresist used in photolithography. The system is compact and cost-effective, while enabling shorter wavelengths than current 13.5nm EUV systems, supporting smaller features and higher transistor density on chips.
Q. Why is your laser-powered accelerator so much smaller than traditional particle accelerators?
A. We use lasers that produce extremely short but highly intense light pulses. These pulses create peak electric fields thousands of times stronger than those in traditional accelerators. Conventional machines cannot operate at such high fields because excessively strong fields would cause sparks and damage the equipment. In our system, acceleration occurs in plasma, where all atoms are already stripped of electrons, allowing the plasma to handle these extreme fields without damage. This enables electrons to accelerate much faster within a far smaller space.
Q. How does the brightness of your light source compare to traditional sources, and how does it affect the system design?
A. The brightness of our light source will generally be similar, but technically it will be far higher than current methods because it is coherent light, essentially a laser beam, while traditional sources are more like a light bulb. This higher brightness allows us to use different types of mirrors and eliminates the need for the very large mirrors traditional systems use to collect light. When I say ‘light bulb,’ I do not mean to diminish the advanced technology in current systems such as the ASML machine; rather, their source is incoherent.
Q. How does your system integrate with the existing lithography tool chain?
A. Our system introduces a new light source, so light delivery will differ, using a different type of mirror. However, the scanner, the part that moves the wafer, can remain the same. We aim to integrate the system with existing machines and scanners while requiring minimal modifications to wafer-scanning components.
Q. What is the expected lifetime and maintenance cycle of your accelerator system?
A. We are still defining that. We are currently developing early applications of these systems for space radiation testing. The accelerated electrons will mimic the radiation present in space, allowing us to ensure the machines are highly reliable and stable well before offering them for semiconductor lithography.
Q. How does this technology address cost and energy-efficiency challenges?
A. The system reduces costs because it does not require the extremely expensive large mirrors used in ASML machines. Instead, it uses a coherent light source and much smaller, more compact mirrors, significantly reducing costs.
For energy efficiency, the process is designed to recover energy lost during electron acceleration and light generation, reinjecting it into the system to minimise energy waste. Because most of the light is not lost across multiple mirrors, the system remains highly efficient.
Q. How does your technology affect the total cost of ownership for chip manufacturers?
A. It is difficult to provide a precise number at this stage because the total cost of ownership involves complex fab-level analysis. However, our technology addresses a key limitation of current EUV systems. By enabling shorter wavelengths rather than relying on higher numerical apertures at 13.5nm, the technology offers a potentially more economical path to advanced lithography. This approach can reduce initial investment, and by developing a highly reliable light source, we aim to keep operating costs low while ensuring the tool meets industry throughput requirements.
Q. Does this technology enable sub-2nm process nodes? How?
A. It enables sub-2nm nodes by providing a shorter-wavelength light source, which overcomes the current limitations of extreme ultraviolet (EUV) technology. EUV today is fixed at 13.5nm, limiting further scaling. Current approaches rely on higher numerical apertures (NA), but high-NA systems are approaching their economic limits. Another method is multi-patterning, which enables smaller nodes but increases complexity and cost. By enabling shorter wavelengths, the technology avoids the escalating cost and complexity associated with high-NA systems and multi-patterning.
Q. Could this technology impact non-lithography semiconductor processes?
A. Yes. As we accelerate electrons, X-rays are generated even before the undulator, without an X-ray laser. These X-rays can be used for metrology, including 3D imaging of integrated chips. Modern chips increasingly contain multiple stacked layers of components, and quality testing of these thicker structures requires high-energy X-rays capable of penetrating them. Our system can generate these X-rays, enabling advanced metrology for non-lithography processes.
Q. Could your system replace existing EUV scanners in the near future, or is it more likely to complement current tools?
A. We believe it is likely to replace them eventually, but that will take time. The cycle time for deploying new equipment in the industry is long. ASML introduced its high-numerical-aperture system only a few years ago for the most advanced chips, and the platform still has several years of operational life ahead. We aim to develop the next generation beyond that. From what we understand, ASML’s push towards ‘hyper NA’ faces economic limitations, as pushing current technology further makes components extremely difficult and expensive to manufacture, reaching price points that are unacceptable to chipmakers. We believe the industry will eventually require a paradigm shift, as extending current EUV technology is becoming increasingly uneconomical. Our technology focuses on advancing the light source for this next stage.
Q. How scalable is your laser-powered accelerator technology for mass production of chips?
A. Our approach is designed to be highly scalable. We plan to create one light source per scanner using a laser-powered accelerator integrated into a free-electron laser. This mirrors the current fab setup, where each scanner has its own light source and laser delivering energy to tin droplets. In contrast, a conventional accelerator would require an extremely large machine to power multiple scanners, meaning fabs would need to be built around it, which would make integration difficult. Our system, however, can directly replace the existing light source in lithography, delivering higher performance while fitting seamlessly into current semiconductor manufacturing workflows.
Q. Are there any physical or engineering limits to your technology similar to those faced by EUV systems?
A. There is no fundamental physical limit in terms of wavelength. By accelerating electrons to higher energies and designing the undulator with a series of magnets, we can create machines that operate across a wide range of wavelengths, including those shorter than 13.5nm. Achieving this requires increasing the power of the laser that accelerates the electrons, and we are actively developing this capability. Laser technology has advanced tremendously over the past 20 years, particularly through a method called ‘chirped pulse amplification’, which won the Nobel Prize in 2018, and we are leveraging that progress to make this possible.
Q. How does this new light-source technology affect chip production speed and overall throughput?
A. Our light source will be extremely bright, allowing wafers to be exposed for shorter periods and increasing fabrication throughput. Currently, with a fixed 13.5nm wavelength, printing smaller features requires multi-patterning, exposing the wafer multiple times, which slows production. By moving to a shorter wavelength, we can avoid multi-patterning, further improving throughput.
Q. How does pulse repetition rate affect wafer throughput in your system?
A. From the beginning, our focus has been on taking this technology from academic and national laboratories and increasing its repetition rate, because that is a key factor in throughput. The system we have built operates at the highest repetition rate demonstrated for this type of high-power accelerator. We will continue to increase the repetition rate to meet industry needs, ensuring our system not only matches current wafer throughput but also improves it over time, helping to avoid multi-patterning.
Q. Can you explain how you successfully transitioned this technology from lab-scale research to commercial deployment, and what challenges you faced along the way?
A. The main challenge was taking a technology developed in a scientific, low-repetition-rate, hand-built laboratory environment and turning it into an industrial tool. This required extensive engineering beyond mechanical design. We had to optimise how we generate electron bunches and condition them with magnetic beam lines. Additionally, because the systems are highly non-linear, we invested heavily in developing control systems that continuously stabilise and optimise machine operation. Turning a hand-built laboratory system into a reliable industrial platform required extensive advances in beam control, stabilisation, and systems engineering.
Q. What failure modes are most critical in continuous fab operation, and how are you addressing them?
A. In continuous fab operation, the most critical failure modes involve the light source, which, like ASML’s systems, is highly complex. It requires extremely detailed engineering to ensure not only stability but also reliability. Our focus from the outset has been on developing a system capable of meeting these demands. To validate this, we are applying our technology in early applications beyond lithography to demonstrate the reliability of our light source from the very beginning. Just as ASML spent several years refining the stability and reliability of its machines, we are taking a similar approach with our light source.
Q. How does reduced power consumption impact fab operating economics?
A. Currently, scanners consume a significant portion of fab power, particularly as throughput increases with higher power and repetition rates. Our approach focuses on maximising wall-plug-to-X-ray-light conversion efficiency. This begins with an efficient, well-designed laser system and includes recovering energy losses so they can be reinjected into the power source, minimising overall losses. This power optimisation applies specifically to the scanner, addressing only its share of the fab’s total power consumption.
Q. What does it take to integrate a container-sized compact free-electron laser into a production chip fabrication facility?
A. Integration would be similar to existing systems from ASML. The large laser system is typically installed below the fab floor, often in the basement, where it generates light that interacts with tin droplets. Our container-sized system would also be placed beneath the fab floor near the scanner. The X-ray light would then be directed to the scanner using mirrors, following a setup comparable to current implementations.
Q. What are the key subsystems of your shipping-container-sized accelerator platform, and how do thermal management and vibration isolation affect its stability?
A. The platform has three main components. The first is the infrared laser system, which generates ultra-short light pulses. These pulses enter the accelerator, where plasma is created in a gas to accelerate electrons. A series of magnets then shapes the electron packets in space, time, and energy before injecting them into the third component: the undulator, a series of magnets that produces X-ray light. At the output, high-reflectivity grazing-incidence mirrors guide the X-rays to the scanner and wafer. Thermal management and vibration isolation are applied across these components to ensure the electron beam entering the undulator remains extremely stable, which is critical for the stability of the X-ray output. Additional mirror stabilisation ensures the delivered X-ray or EUV light remains steady.
Q. How reliable and maintainable are these systems for continuous production use?
A. Moving these systems into industrial use will take time. First, we need to develop the technology to reach the light levels required for competitive wafer throughput. Once that is achieved, the next step is to make the system viable for continuous operation by ensuring consistent performance on every shot, similar to the path ASML took to make its light sources reliable. With modern tools, we expect progress to be faster, but significant work will still be required.
Q. What impact could your technology have on chip design, speed, and power efficiency for AI and advanced computing applications?
A. By moving to shorter wavelengths, our technology can extend Moore’s law beyond current limits, approaching the ultimate node size where features are only a few atoms wide and chip operation nears quantum limits. This would allow chips to achieve even smaller features and higher transistor density than today’s EUV technology, improving performance and efficiency. Future quantum computing applications will also require X-rays to create these features. Overall, shorter wavelengths are key to preventing a technological ceiling in semiconductor development and enabling more advanced AI and computing applications.
Q. What throughput gains are achievable at production scale?
A. Achievable throughput depends on many factors, making it difficult to provide exact figures at this stage. The goal is to push beyond current fundamental limits by moving to shorter wavelengths while ensuring the system delivers the required light power into the scanner. The exact gains will become clearer only after several years of development.
Q. What scaling limits do you foresee for your compact accelerator technology?
A. To achieve shorter wavelengths or higher-energy X-rays, we need to scale various components of the system. We plan to determine the optimal balance as the technology develops, working closely with the semiconductor industry to integrate it in a way that is more cost-effective than current alternatives.
Q. What roadmap are you following for volume manufacturing deployment?
A. Our roadmap begins with developing the technology through early applications such as space radiation testing, which helps mature the machine as a commercial and industrial tool. After that, we will be well-positioned to integrate the technology into semiconductor applications.
Q. Beyond semiconductor manufacturing, what other applications could benefit from your technology?
A.The first application we are targeting is space radiation testing. Electronic components sent into space are exposed to radiation, and testing them currently requires access to a limited number of oversubscribed government facilities in the U.S. capable of accelerating ions. Over the past few years, we have been developing a method that uses packets of electrons as a substitute for ions to achieve the same testing effect. This will significantly increase testing availability, which is crucial for the rapidly growing space industry, while helping ensure components operate as intended in space. We plan to open our first space radiation testing centre in California before the end of the year.
These early applications not only provide significant benefits but also serve as valuable testbeds for our technology, demonstrating the machines’ cost efficiency, power efficiency, and reliability.
Q. What are the current commercial deployment milestones for your technology, and which chipmakers and fabs are exploring it?
A. We are developing all parts of the system while working to increase their power and repetition rate. To achieve this, we are applying the technology to other areas, such as space-related applications, ensuring that our machines are industrial-grade tools from the outset. This process helps us refine and improve the technology. As development progresses, we will engage with the semiconductor industry to understand its needs and ensure the technology fully aligns with production requirements when it is ready. We are not at liberty to discuss all our industry interactions, but we are currently in discussions with two major semiconductor companies regarding this technology, and we are seeing significant interest.
Q. Do you see other companies working on similar technology, and how does your approach compare?
A. Yes, other companies are using conventional accelerators to produce similar light sources. Our approach uses a laser-powered accelerator, which offers several key advantages. First, it is compact, enabling one light source per scanner rather than requiring fabs to be built around a very large accelerator facility. With conventional facilities serving multiple scanners, maintenance downtime can halt all scanners simultaneously, reducing manufacturing throughput. Our compact system avoids this issue and aligns more effectively with current operational models.
Q. What are the next technical milestones for your company in terms of increasing throughput, wavelength range, or system robustness?
A. We still have significant development work ahead. We are currently developing the system and plan to apply it to space-related testing this year. Within five years, we aim to be in a strong position to begin developing semiconductor lithography applications using proven subsystems that meet the semiconductor industry’s demanding standards. Our goal is to ensure all systems operate at the quality, reliability, and efficiency levels expected by semiconductor manufacturers.


