An Indian startup is developing semiconductor IP blocks that enable chips to adapt to signal imperfections through real-time AI/ML-driven learning within silicon systems.
Most people think of a chip as one complete product. In reality, modern semiconductors are built from many smaller functional blocks. Vervesemi focuses on creating these critical internal building blocks, known as semiconductor intellectual property (IP), that other chipmakers can integrate into their own designs.

Founded in 2017 by Pratap Narayan Singh and Rakesh Malik, the company was created to develop original semiconductor technology in India rather than merely contributing engineering talent to overseas firms. It operates as a fabless semiconductor company, concentrating on intellectual property, product design, and architecture, while outsourcing manufacturing to commercial semiconductor fabrication facilities. The name combines ‘Verve,’ meaning life, with ‘Semi,’ referring to semiconductors. Together, the two reflect the company’s vision of bringing semiconductors to life.
What Vervesemi created first was not a ‘chip’ in the everyday sense. It was a semiconductor IP block, a pre-designed circuit module. In this context, an IP is not software, an app, or a standalone product. Instead, it is a carefully engineered circuit design that can include both analogue and digital components. Once manufactured, it becomes a functional part of a larger semiconductor chip.
However, Vervesemi did something unusual with its analogue IP blocks. The company integrated a machine learning-based system directly at the silicon level, tightly coupled with the analogue circuitry. This system was not predictive in the abstract sense; it did not assume conditions before manufacturing. Instead, it operated in real time, observing how the hardware behaved during actual use.
In practice, no analogue system is perfect due to factors such as manufacturing variations, environmental conditions, ageing, power-supply fluctuations, reference-voltage drift, and signal-path noise. Engineers typically work to reduce these issues, but they cannot eliminate them entirely.

“But by integrating a machine learning-based system, we focus on continuously observing these deviations as they occur, learning from them dynamically, and building a digital model of the analogue behaviour, including its imperfections. We then use this model to correct errors in real time, adjusting system behaviour to improve accuracy, stability, and overall performance,” says Pratap.
The company has developed a broad portfolio of more than 140 semiconductor intellectual property (IP) blocks, which it has been licensing internationally over the past eight years. These IPs cover a wide range of analogue and mixed-signal functions that form the foundation of modern signal chains, including clocking systems, ADCs, DACs, variable-gain amplifiers (VGAs), programmable-gain stages (PGs), and precision filters.
Speaking about the design challenges, the company has faced, Pratap says, “Designing analogue systems is not just about architecture or circuit design. The real challenge begins when these chips are deployed in the field, where customers need to determine whether a fault lies in the chip or elsewhere in the system.”
At production scale, testing millions of units quickly becomes a bottleneck, making traditional methods impractical. In critical applications such as automotive and aviation, even a single failure is unacceptable, necessitating robust diagnostics, redundancy, and high reliability. Unlike digital systems, analogue designs operate at the transistor and signal level, making both testing and manufacturing significantly more complex.
The company operates design and R&D centres in Greater Noida and Bengaluru while using external semiconductor fabrication partners, consistent with the fabless model.
“We are already engaged with semiconductor fabs working on advanced technology nodes and are actively exploring future development, including components at the 4nm scale. If a customer moves from nodes such as 12nm to 8nm or 5nm, we align our development accordingly and build solutions to meet those specific needs,” adds Pratap.
In terms of academic and institutional collaboration, the company is engaged with select IITs, primarily for training and capability development.





