Purpose of role
A technical contributor on ASIC and IP development projects, working very closely with the senior designers and other engineering teams to implement digital IP designs and integrate these and 3rd party designs into customer ASICs and SoCs.
This role involves processing customer technical requirements, proposing solutions, and working collaboratively in a multi-site development environment.
You will contribute to designs using a range of hardware description languages and tools. The candidate would also be occasionally involved in supporting verification tasks, design methodology development and other tasks required by the wider engineering team.
Why work for Sondrel?
- Learning & leadership opportunity to be exposed to cutting-edge technologies and global business.
- Opportunity to work on applications such as AI, Automotive, Fintech and Internet of Things (IoT).
- World Class Customers.
- Multi-cultural, multinational work environment with challenges.
- Work for one of Europe’s leading concept-to-silicon design centers and play a key role in working on a variety of exciting projects.
- Become an integral member of a truly global business with excellent opportunities for continued learning and skill development.
- Work Life Balance.
- FPGA Design flow – Design, Simulation, Synthesis, PnR, mainly targeted at Xilinx FPGAs.
- Specify and review FPGA prototyping hardware.
- Debug of implemented IPs utilising a variety of FPGA debug methodologies – simulation, embedded analyser, external test equipment, purpose designed debug modules.
- Collaborate closely with software team to bring up IP and develop drivers.
- Contribute to technical white papers and conference papers.
- Provide FPGA technical expertise to pre-sales team for customer engagements.
UG/PG: B. Tech/B.E. – Electrical, Electronics/Telecommunication, Computers. Experience of minimum 3+ years is mandatory.
Skills and Experience
- Typically, 3+ years’ experience. Guided by program or project objectives.
- Strong logic design background with ability to develop RTL utilizing a hardware description language (e.g. VHDL, Verilog, and/or System Verilog) and debug the design via simulation tools
- FPGA logic Synthesis using Synplify premier and Xilinx toolset.
- Perform synthesis and place and route (FPGA) or support foundry backend development activities (ASIC)
- Familiarity with UVM-based functional verification concepts and methodologies, as they apply to design for test
- Experience of ISE and Vivado.
- Strong coding, debugging, algorithm design and problem-solving skills
- Experience of small CPU and AXI based systems
- Serves as an independent individual contributor to technical project, demonstrate success in a fast-paced, cross-functional engineering team environment
- Demonstrates capability as a problem solver with an ability to work individually and interfacing with the SW team, the end customer of his work
- Broadens cross disciplinary knowledge through new assignments, Ability to quickly pick up new concepts and contribute with innovative solutions
- Develops and presents technical white papers.
Duties & Activities
- Development, maintenance and deployment of proprietary scripts and tools used in the design and database management of ASICs/SoCs.
- Deployment of industry-leading EDA tools for design quality assurance and optimisation.
- Collaborate with senior team members to identify and resolve problems
- Collaborate with team members from other engineering disciplines to ensure strategy is implemented successfully throughout the design process.
- Ability to take secondments abroad for 3-6 months.
- Applies advanced knowledge of a single sub-function OR thorough knowledge of multiple sub-functions
Csh, Tcl, Perl, Python and C
- PCB design
A degree/masters or PhD in either a relevant or non-relevant subject.
- Self-organisation and ability to respond to changing priorities quickly
- Team player
- Ability to work under pressure
- Organisation and problem-solving skills
- Excellent attention to detail
- Able to work under own initiative