Thursday, June 13, 2024

RTL Design Engineer At Terminus Circuits Pvt Ltd

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About the job

The job function demands for the deep understanding on the protocols like USB, PCIE, MIPI, JEDEC, I2C, SPI etc. Design/verify the RTL code for the high speed SerDes related digital blocks

  • Excellent verbal and written communication skills are required.
  • Experience in synthesis of complex SoCs block/top level and writing timing constraints.
  • Experience in formal verification RTL-to-netlist and netlist-to-netlist with DFT constraints.
  • Experience in post-layout STA closure and timing ECOs
  • Worked in technology nodes 45nm and below.

Mandatory Skills

  • Timing Closure, STA, ECOs, Synthesis, SDC
  • Education Qualification
  • BE/B.Tech in VLSI/ECE.
  • 1+ years of experience in verification of analog mixed signal blocks.
  • Hands on tool expertise
  • Tools: cadence AMS tools and proficiency in Verilog, verilogA and VAMS language

Location: Bengaluru

Company: Terminus Circuits Pvt Ltd

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