Friday, December 19, 2025

Automating Early Stage Chip Design

Rapidus Launches AI Design Tools to Accelerate Next-Generation Chip Manufacturing
Rapidus Launches AI Design Tools to Accelerate Next-Generation Chip Manufacturing

This AI powered approach enables chip designers to evaluate design quality, manufacturability, and performance much earlier in the development process.

As the demand for semiconductor shrinking increases, chip designing is becoming more complex for engineers who must now manage massive design data, strict power and performance targets much earlier in development. Traditional design flows depend heavily on manual iterations, making it difficult to shorten timelines or control costs. Chip developers increasingly need intelligent tools that can automate early design work, predict issues in advance and connect design decisions directly with manufacturing requirements.

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To meet these demands, Rapidus Corporation has introduced its Rapidus AI powered semiconductor design tools (Raads). The tools are part of Rapidus’ Rapid and Unified Manufacturing Service concept, which aims to tightly link chip design and advanced manufacturing for next generation semiconductors.

Raads uses machine learning to support and automate key stages of the chip design process. One of the first tools, Raads Generator, applies large language models to convert design specifications into RTL data optimized for Rapidus manufacturing processes. Another tool, Raads Predictor, helps engineers debug RTL and estimate power, performance and area early in the design cycle, before costly design changes are required.

Raads integrates with existing EDA workflows, allowing engineers to evaluate design quality and manufacturability much earlier than with conventional methods. Rapidus states that this approach can reduce overall design time by about 50 percent while lowering development costs by roughly 30 percent.

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The Key features of the platform are : 

  • AI generated RTL from high level design specifications
  • Early prediction of power, performance, and area metrics
  • Support for RTL debugging and layout related decisions
  • Compatibility with existing EDA tools and workflows
  • Planned expansion into quality checks and optimization

The company plans to expand the additional chip manufacturing assistant tools, aiming aims to help chip developers move faster from concept to production ready silicon while reducing risk and improving alignment with advanced manufacturing technologies.

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