A new power device design could change how power fits inside AI systems by moving heat out faster and helping engineers pack more power into smaller racks.
Navitas Semiconductor has introduced two new package options for its fifth-generation GeneSiC silicon carbide power devices, aimed at improving power density and thermal performance in high-power systems.
The devices include a top-side cooled QDPAK package and a low-profile TO-247-4L package with asymmetrical leads. Both support 1200 V SiC MOSFETs and are designed to improve device ruggedness while helping system designers manage heat and board space.
The devices are built on the company’s fifth-generation Trench-Assisted Planar (TAP) SiC technology. This design improves the RDS(on) × QGD figure of merit by about 35% and improves the QGD / QGS ratio by around 25%. The devices also maintain a gate threshold voltage above 3 V to reduce the risk of parasitic turn-on and enable stable switching.
The QDPAK package focuses on thermal management. Instead of removing heat through the PCB, the design moves heat directly from the top of the package to a heatsink. This reduces thermal resistance and helps shrink overall system size. Lower parasitic inductance in the package also supports cleaner switching at higher frequencies.
The QDPAK structure allows larger die sizes and higher current capability, enabling very low RDS(on) values for high-power designs. Its surface-mount format supports automated manufacturing and high-volume assembly.
The package has a footprint of 15 mm × 21 mm and a height of 2.3 mm. A molded groove increases creepage distance to 5 mm without enlarging the package size. It supports up to 1000 VRMS operation and uses an epoxy molding compound with a comparative tracking index above 600.
The second option, the TO-247-4-LP through-hole package, targets systems where vertical space on the board is limited. By reducing the height above the PCB compared with the standard TO-247-4 package, the design allows higher power density in compact systems.
This package also introduces asymmetrical leads. Thinner leads for the gate and Kelvin-source pins improve assembly accuracy during PCB manufacturing.
The design is intended for applications such as AI data-center power supplies, where system size and height limits are strict and efficient thermal management is required.
“Our customers are pushing the boundaries of what is possible in AI data center and energy infrastructure applications,” said Paul Wheeler, VP & GM of the SiC business unit at Navitas.
