The technology integrates two key generative AI functions into a single ferroelectric memory platform for improved power efficiency.
Researchers at Seoul National University have demonstrated an AI semiconductor technology which integrates two core functions required for generative AI-random sampling and stable computation into a single memory array platform based on ferroelectric memory. This is the first demonstration to combine these two functionalities into one memory array and can improve on the area and power efficiency of future chip-scale AI systems for generative AI.
The scientists took advantage of the voltage-dependent character of hafnium oxide-based ferroelectric memory technology to execute various tasks in the same memory cell. The high voltage causes random telegraph noise (RTN) generation for probabilistic sampling, while at lower voltages it suppresses RTN to enable stable vector-matrix multiplication (VMM)using non volatile multi-level conductance states. Thus, the scientists managed to avoid the necessity for having separate hardware or any external random number generators for performing those tasks.
The idea was tested through experiments using a NOR-type ferroelectric memory chip on a 15-centimetre wafer. Optimised through voltage control and sampling times, the researchers generated images with a variational autoencoder (VAE) using the CelebA dataset. In circuit tests, stable performance in generating images was observed after about 100,000 operations.
According to the researchers, the integration of sampling and decoding in one memory chip, while keeping the compatibility with CMOS technology, can make the design simpler and more efficient. The researchers intend to refine sampling rates, parallelism, array size, and peripheral circuits to allow for real-time hardware generation.
Lee, who led the study, stated, “Achieving both probabilistic sampling and deterministic computation simultaneously is a key challenge in generative AI hardware. This work is significant in that it demonstrates these two functions can be realized within a single device platform by leveraging the voltage-dependent characteristics of ferroelectric memory.”
