A chip design moves memory inside the package, reducing board space and changing how systems are designed.

AMD has introduced the AMD Versal Premium Gen 2 Memory on Package (MoP) adaptive system-on-chips (SoCs), integrating up to 32GB of LPDDR5X memory within a single package. The devices deliver up to 288GB/s of memory bandwidth while reducing board area by up to 60%, allowing engineers to build high-bandwidth systems in smaller form factors without the complexity of board-level memory design. The SoCs are designed for applications with space and power requirements, including physical AI, networking, aerospace and defense, test and measurement equipment, professional video editing systems, and VPX platforms for secure communications and defense acceleration.
By integrating LPDDR5X memory directly inside the package, the MoP architecture provides higher performance than onboard LPDDR5X while occupying less board space than discrete memory implementations. This enables designs such as Enterprise and Datacenter Standard Form Factor (EDSFF) and 3U VPX systems, while helping designers meet telecom and VPX requirements that are difficult to achieve using external memory.
The Versal Premium Gen 2 MoP devices also combine CXL 3.1 and PCIe 6.0 connectivity with hard IP operating at up to 64Gb/s, enabling data transfer when paired with AMD EPYC CPUs for data-intensive workloads. They support LPDDR5X memory speeds of up to 9,000Mb/s and can connect to CXL memory pooling and expansion modules, giving system architects flexibility to scale memory resources.
The devices operate across a temperature range of -40°C to 110°C, making them suitable for industrial, enterprise AI, aerospace, and defense applications. They are supported with product life cycles of more than 15 years, reducing redesigns caused by the refresh cycles and availability limitations associated with high-bandwidth memory (HBM).
The devices include hardware security features to protect data in transit and at rest. PCIe Integrity and Data Encryption (IDE), introduced with PCIe 6.0, secures data moving across the PCIe interface, while integrated DDR memory encryption protects stored data without consuming programmable logic resources. Built-in 400G crypto engines further support secure data processing for bandwidth-intensive applications.
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