Tuesday, April 23, 2024

Associate ASIC – FPGA Design and Verification Engineer At Boeing

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Location: Bengaluru

Company: Boeing

Boeing India Engineering seeks Associate ASIC – FPGA Design and Verification Engineer to support the Hardware Design Capabilities organization across multiple product lines and platforms like Satellites, space and aviation.

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A successful candidate will understand the importance of collaboration as this position will focus on working directly with the Electronics Product Development Manager.

Position Responsibilities:

  •  Performs design and verification engineering, reporting status to management.
  • Resolves complex issues on critical programs related to architectural approaches, requirements, specifications and design. Leads technical aspect of proposal preparation.
  • Identifies critical performance measures and develops processes for computing them.
  • Leads activities in support of Supplier Management with make/buy recommendations and other technical services.
  • Coordinates engineering support throughout the lifecycle of the product.
  • Develops new concepts for future product designs to meet projected requirements.
  • Evaluates and integrates third-party IP and verification IP (VIP).
  • Provides basic engineering support throughout the lifecycle of the product.
  • Conducts trade studies and literature research to support future product designs.
  • Stays current on new technologies and best practices.
  • Works under consultative direction.

Basic Qualifications (Required Skills/Experience)

  • Bachelor, Master or Doctorate of Science degree from an accredited course of study, in engineering, computer science, electronics, mathematics, physics or chemistry etc.
  • 6 or more years of experience in Digital ASIC design and verification.
  • Work experience using Verilog or System Verilog.

Preferred Qualifications (Desired Skills/Experience)

  • Bachelor’s degree and 6 or more years’ experience in digital ASIC/FPGA design and verification, Master’s degree with 5 or more years’ experience in digital design/verification, or PhD degree with relevant years of experience in digital design/verification.
  • Experience in independent design of RTL code from requirements, reporting status to program management.
  • Experience working other engineering teams (e.g. board designers, system engineers, requirement engineers, reliability engineers, microprocessor/software engineers), to ensure the ASIC/FPGA functions safely and reliably when deployed by assisting in Worst Case Circuit Analysis, IO timing, IO type selection, life analysis, software con-ops, MTBF analysis, etc.
  • Experience creating and improving department process guidelines and procedures (e.g. engineering standards, checklists, process flows, etc.).
  • Experience evaluating and recommending technology that is new to the organization.
  • Experience leading development of architectural approaches from customer and system requirements.
  • Experience designing digital ASIC/FPGA architectural design documents (micro-architecture documents with timing diagrams, detailed design blocks, etc.).
  • Experience deriving digital ASIC/FPGA requirements specification from higher-level (system or board-level) requirements specifications.
  • Experience identifying, tracking, and providing status of technical performance metrics to measure progress and ensure compliance with requirements.
  • Experience developing complex and high data rate designs.
  • Work experience performing RTL synthesis.
  • Work experience performing clock cross domain analysis (CDC).
  • Work experience performing Static Timing Analysis and correcting timing violations.
  • Work experience writing Universal Verification Methodology (UVM) sequences and virtual sequences.
  • Work experience using Linux or Unix terminal commands.
  • Experience using scripting languages: Make, Perl, Python, shell scripts, etc.
  • Experience using Revision Control Systems: Subversion (SVN), CVS, Git.
  • Work experience simulating a digital design using System Verilog Assertions.
  • Work experience using Object Oriented Programming concepts: Inheritance, Polymorphism, etc.
  • Work experience using Universal Verification Methodology (UVM): Experience crafting drivers, monitors, predictors, and scoreboards.
  • Experience on Digital interfaces such as LDVS, Space wire, Fiber Channel, RS422, MIL1553, SRIO, Audio Video Interfaces, Ethernet, PCIe Gen3 and above.
  • Work experience creating a self-checking simulation testbenches from scratch.
  • Experience mentoring junior engineers.
  • Experience in establishing and rigorously implementing processes such as DO254, MIL-STD-882E an MIL-HDBK-516 or equivalent industry standards for commercial platforms

Typical Education & Experience:

Education/experience typically acquired through advanced education (e.g. Bachelor) and typically 6-8 years of related work experience or an equivalent combination of education and experience (e.g. Master 5+ years’ related work experience, etc.).


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