Power system designers are demanding even higher input voltage ranges from their component power suppliers. Vicor recently introduced a wide-input-range zero voltage switching buck regulator that accepts inputs up to 36V, yet provides a 1.8V, 15A output at efficiencies typically exceeding 90 per cent—all in a 14×10×2.6mm3 SIP. The technology to achieve this performance was developed in-house and utilises a clamp-switch to minimise losses in switching the main FET.
Today, battery-system designs typically have at least one of the following integrated circuits (ICs), in addition to the system’s main chipset (if applicable):
1. Power management unit
2. Microcontroller unit
3. Battery management unit
The power management unit offers regulated voltage or current in a system.
“Some voltage regulations are also integrated into the main chipset. However, a monolithic converter is still required due to the complexity of the layout, EMI concerns and lack of performance, including an insufficient amount of power-output channels or load capabilities, etc. Monolithic voltage converters are available with single output and multiple outputs,” adds Brian.
To know how to select low-power MCUs for your project, you may please refer to “How to Select A Microcontroller” article published in Dec. 2012 issue of EFY.
Computing elements and scaling clock rates. Power consumption by processor cores can be controlled in a big way by utilising the various sleep modes available. Advanced Micro Devices’ Larne reference platform is projected to measure APU power at 1.2W during idle mode, 1.4W during Web browsing, 2.35W during video playback and 0.02W during a system’s sleep state.
Abhishek advises design engineers to keep in mind many factors in their system architecture and design during development.
“More specifically, engineers must take well-informed system architecture decisions, choose optimal components and provide microcontrollers that optimise functionality, resulting in a longer battery life. This is definitely much more complex than simply estimating how much current the CPU consumes when active. Depending on the application being developed, standby current, peripheral current or data logging current may have a more significant impact on battery life than CPU power,” he shares.
The second aspect that increases the battery life is dynamic voltage scaling. “It is a framework to change the frequency and/or operating voltage of a processor based on system performance requirements at a given point of time. Power devices with dynamic voltage scaling as an inbuilt feature will help lower power consumption of the CPU in mobile devices,” adds Abhishek.
“An increase in clock speed or bus-width increases power consumption in direct proportion. Therefore design the system to run as slow as practical in all the operating modes that you have decided,” advises T. Anand, MD, Knewron.
Next, check whether the processor is static or dynamic. “Dynamic core processors are not usually made for low-power applications as they don’t respond well to slow or stopped clocks. If the datasheet says ƒosc = 0, you can slow down as much as you want,” Anand explains.
These idle modes ensure that the system merely sips power when not in use while at the same ensuring sufficient power for intensive number-crunching sessions. The silicon itself is built with a technology that ensures ultra-low power consumption.
“Engineers have now implemented an effective clock circuit strategy to ensure that unused processes can be shut down and consumption kept to a minimum. Moreover, in our pursuit of better performance, we have moved away from proprietary cores towards ARM cores. This has enabled us to have different products, each targeted towards high performance, standard low power and even ultra-low power,” explains Affa Au, director-marketing, South Asia, Fujitsu Semiconductor Asia (Pte) Ltd.
“While slowing down strategy is going to save power, it sure will affect computing capability negatively. Having clock speed control on-the-go can help a lot in such cases, where device remains slow or static in power saving/down mode and speeds up only when necessary,” adds Anand.
Energy efficiency requires more of an evolutionary than revolutionary approach. “In a portable environment such as a handheld industrial test gadget, it is highly desirable for the device to last a complete shift on a single charge and so enabling low-power ‘drowse’ modes when not in use is sensible. If it takes the device 0.5 second to come back up to operational speed, that is likely acceptable. Other industrial devices that have real-time control functions like a robot are more safety-oriented. The controller part probably consumes a small percentage of the energy use compared to the motor drives and so controller power saving is less desirable,” explains Brian Brown, vice president of marketing, embedded computing, Emerson Network Power.