HomeElectronics NewsHydrogen Plasma Process For Chip Packaging

Hydrogen Plasma Process For Chip Packaging

The hydrogen plasma method cleans chip surfaces during stacking. It helps make connections, supports more interconnects, and allows faster signals in chip packaging.

Micro-bump structure after thermocompression bonding
Micro-bump structure after thermocompression bonding

Dr. Robert F. Hicks, President and CEO of Surfx Technologies LLC, with his team, has developed a method using in situ atmospheric pressure hydrogen plasma for semiconductor packaging. The method removes metal oxides from micro-bumps and hybrid bonds during the stacking of integrated circuits, an essential step in making 2D and 3D chip packages.

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Stacking chips with small interconnects—less than 50 microns apart—requires accurate bonding of copper pillars with solder caps. Flux is usually used to remove oxides, but at such small distances, the residue from flux cannot be cleaned and may cause issues. To solve this, the team developed a process that uses weakly ionized hydrogen plasma inside the thermocompression bonding tool. The plasma removes the oxide by turning it into metal and water vapor, leaving no residue.

At atmospheric pressure and below 200°C, the plasma makes hydrogen radicals that remove oxides on solder micro-bumps and copper pads. This must be done in an inert environment inside the bonding tool to stop re-oxidation. The Atomflo™ plasma system from Surfx Technologies creates a steady beam of radicals that moves over wafers or dies, supporting fast processing for production.

The process removes oxide layers from copper without damaging micro-bumps or raising the temperature beyond chip limits. It supports dense interconnects and allows signal speeds over 5 GHz with low signal loss. The method avoids the limits of flux cleaning and works with different bonding types, including micro-bumps and hybrid bonds.

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The in situ hydrogen plasma process from Dr. Hicks and Surfx Technologies gives a no-residue way to remove oxides in semiconductor packaging. As chip designs become smaller and more connected for uses like AI, 5G, and cloud computing, this process may help shape the future of chip manufacturing.

Nidhi Agarwal
Nidhi Agarwal
Nidhi Agarwal is a Senior Technology Journalist at Electronics For You, specialising in embedded systems, development boards, and IoT cloud solutions. With a Master’s degree in Signal Processing, she combines strong technical knowledge with hands-on industry experience to deliver clear, insightful, and application-focused content. Nidhi began her career in engineering roles, working as a Product Engineer at Makerdemy, where she gained practical exposure to IoT systems, development platforms, and real-world implementation challenges. She has also worked as an IoT intern and robotics developer, building a solid foundation in hardware-software integration and emerging technologies. Before transitioning fully into technology journalism, she spent several years in academia as an Assistant Professor and Lecturer, teaching electronics and related subjects. This background reflects in her writing, which is structured, easy to understand, and highly educational for both students and professionals. At Electronics For You, Nidhi covers a wide range of topics including embedded development, cloud-connected devices, and next-generation electronics platforms. Her work focuses on simplifying complex technologies while maintaining technical accuracy, helping engineers, developers, and learners stay updated in a rapidly evolving ecosystem.

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