What you’ll be doing
- Be part of a cross functional Global Circuits Team, designing and delivering Digital and/or Analog full custom circuit IPs
- Be involved in design and verification of Custom Circuit IPs to improve power, performance and security of NVIDIA CPU, GPU and Networking chips
- Being responsible for thorough transistor level design, spice verification, delivering various IP views/collateral for SOC needs
- Ability to understand architectural specifications and develop custom circuits according to the specifications
- Ability to close design to the specs by running various flows like EM, IR, Noise, static timing analysis (STA), Ensuring compliance of IP to SOC needs
- Develop state of the art flows for timing, EM/IR, LEF generation or other verification needs.
- Develop variation tolerant circuits in advanced technologies like 7nm and below.
What we need to see
- You would need to have sound fundamentals in CMOS devices, basics of VLSI design and really good timing concepts
- Prior experience is required with Cadence virtuoso environment, HSPICE simulations, variation analysis and transistor level design.
- Proficiency in Perl/Python or equivalent scripting language is a requirement.
- Prior exposure to some form transistor level design like clock design, memory design, analog design (PLLs/LDOs) will be a huge advantage.
- Experience in advanced technology nodes like 7/5 nanometers is a huge plus.
- Prior exposure with circuit flow development will be helpful.
- Prior knowledge of Primetime (STA) is a big plus
- Good interpersonal skills, Should be an excellent teammate.
- BE/M-Tech in Electrical & Electronics or equivalent
- 2-5yrs of experience
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