Functions of a ground plane
Ground plane serves the following EMC and signal-integrity functions:
1. It has very low RF impedance and, hence, can provide devices and circuits with stable voltages at RF, which can be distributed evenly to a large number of devices and components by avoiding voltage drops.
2. RF return currents flow via 0V reference and, if a plane is used, return current can take whichever path it wants to, but prefers a path with lowest overall impedance (that is, one with least inductance and highest capacitance). So when a trace is routed over a ground plane, return currents will flow back right underneath the trace, reducing loop area enclosed by forward and return paths, thus reducing differential mode emission and susceptibility.
3. A plane underneath a track carrying high-frequency currents or a noisy IC will also behave as an image plane. As such fields emanating from the track or IC will be capacitively coupled to the image of the track in the plane rather than spreading out into space. This will reduce common-mode emissions.
4. Capacitive filters for blocking common-mode voltages are normally mounted between tracks entering the board and 0V reference. These bypass common-mode currents to ground, and a ground plane provides the ideal low-impedance path for these currents to ground.
Size of 0V plane
Size of a 0V plane must be such that it does not only lie beneath all components and traces of a circuit but also extends beyond these on all sides of the PCB by as much an amount as possible. This is because, although forward currents through a trace are constrained to flow in the trace, return currents flowing through a plane beneath the trace can spread out in the plane on either side of the trace. So edge of the ground plane should extend more than three times the trace-to-plane spacing (or three times the track width).
Openings and discontinuities in ground plane
Ground planes, as far as possible, should be continuous throughout. In a practical scenario, this is virtually impossible since anti-pads have to be provided in the ground plane. This causes the ground plane to be perforated, thus increasing its inductance. The situation can be controlled, first by restricting the urge to have tracks that change layers, second by optimising the size of anti-pads (<1mm) and third by using microvia technology, where anti-pads are largely eliminated.
Optimising anti-pad PCB design
Another issue with dense boards is that anti-pads should not merge with one another, otherwise these can create a larger opening that obviously hinders free flow of return currents and ruins the performance of the plane. In such cases, anti-pads’ dimensions and placement must be such that there is a web of 0V between these.
Connection of devices to planes
High contact impedance caused by improper connections of devices to 0V or power planes can be enough to compromise the low impedance benefits gained by using planes for 0V and power. Low inductance can be ensured by the following considerations:
1. Reducing the length and increasing width of the traces between pads and via connecting the component to 0V plane. The best way is to eliminate such traces altogether by using via-in-pad design.
2. Reducing the spacing between the 0V plane and the component, which will reduce the length of the via connecting the component to the plane, thus reducing via inductance.
3. Keeping vias carrying opposite currents as close to each other as possible to maximise their mutual inductance.
Position of devices
Digital ICs and crystals are known to generate intense near-fields in their immediate vicinity that can radiate, causing common-mode noise generation and coupling to nearby traces. This spread can be reduced by using an unbroken ground plane on the immediate bottom layer of the noisy component, which serves as an image plane terminating the radiated fields.
If the ICs are located near the edge of the PCB, 0V plane will be only on one side of the IC and the fields can radiate from the other side. Hence, noisy ICs and crystals should never be located on the edge of the PCB. As a general rule of thumb, ICs carrying digital signals with rise time of two nanoseconds or analogue components with frequencies more than 200MHz, should have an unbroken plane that extends at least 5mm beyond its periphery.
To read more about Multi-Layer PCB Design, turn to page 4